adapt to changes in the cortex-m crate

examples/one-task.rs

@@ -43,7 +43,7 @@ app! {
     }
 }
 
-fn init(p: init::Peripherals, r: init::Resources) {
+fn init(mut p: init::Peripherals, r: init::Resources) {
     // `init` can modify all the `resources` declared in `app!`
     r.ON;
 

macros/src/trans.rs

@@ -370,10 +370,10 @@ fn init(app: &App, main: &mut Vec<Tokens>, root: &mut Vec<Tokens>) {
                 });
             }
             Kind::Interrupt { enabled } => {
-                // Interrupt. These can be enabled / disabled through the NVIC
+                // Interrupt. These are enabled / disabled through the NVIC
                 if interrupts.is_empty() {
                     interrupts.push(quote! {
-                        let nvic = &*#device::NVIC::ptr();
+                        let mut nvic: #device::NVIC = core::mem::transmute(());
                     });
                 }
 

src/examples/_0_zero_tasks.rs

@@ -2,6 +2,7 @@
 //!
 //! ```
 //! #![deny(unsafe_code)]
+//! #![deny(warnings)]
 //! // IMPORTANT always include this feature gate
 //! #![feature(proc_macro)]
 //! #![no_std]
@@ -27,8 +28,9 @@
 //! // this function.
 //! fn init(p: init::Peripherals) {
 //!     // This function has access to all the peripherals of the device
-//!     p.GPIOA;
+//!     p.core.SYST;
-//!     p.RCC;
+//!     p.device.GPIOA;
+//!     p.device.RCC;
 //!     // ..
 //! }
 //! 

src/examples/_1_one_task.rs

@@ -2,6 +2,7 @@
 //!
 //! ```
 //! #![deny(unsafe_code)]
+//! #![deny(warnings)]
 //! #![feature(proc_macro)]
 //! #![no_std]
 //! 
@@ -9,8 +10,9 @@
 //! extern crate cortex_m_rtfm as rtfm;
 //! extern crate stm32f103xx;
 //! 
-//! use cortex_m::peripheral::SystClkSource;
+//! use cortex_m::peripheral::syst::SystClkSource;
 //! use rtfm::{app, Threshold};
+//! use stm32f103xx::GPIOC;
 //! 
 //! app! {
 //!     device: stm32f103xx,
@@ -37,31 +39,31 @@
 //! 
 //!             // These are the resources this task has access to.
 //!             //
-//!             // A resource can be a peripheral like `GPIOC` or a static variable
+//!             // The resources listed here must also appear in `app.resources`
-//!             // like `ON`
+//!             resources: [ON],
-//!             resources: [GPIOC, ON],
 //!         },
 //!     }
 //! }
 //! 
-//! fn init(p: init::Peripherals, r: init::Resources) {
+//! fn init(mut p: init::Peripherals, r: init::Resources) {
 //!     // `init` can modify all the `resources` declared in `app!`
 //!     r.ON;
 //! 
 //!     // power on GPIOC
-//!     p.RCC.apb2enr.modify(|_, w| w.iopcen().enabled());
+//!     p.device.RCC.apb2enr.modify(|_, w| w.iopcen().enabled());
 //! 
 //!     // configure PC13 as output
-//!     p.GPIOC.bsrr.write(|w| w.bs13().set());
+//!     p.device.GPIOC.bsrr.write(|w| w.bs13().set());
-//!     p.GPIOC
+//!     p.device
+//!         .GPIOC
 //!         .crh
 //!         .modify(|_, w| w.mode13().output().cnf13().push());
 //! 
 //!     // configure the system timer to generate one interrupt every second
-//!     p.SYST.set_clock_source(SystClkSource::Core);
+//!     p.core.SYST.set_clock_source(SystClkSource::Core);
-//!     p.SYST.set_reload(8_000_000); // 1s
+//!     p.core.SYST.set_reload(8_000_000); // 1s
-//!     p.SYST.enable_interrupt();
+//!     p.core.SYST.enable_interrupt();
-//!     p.SYST.enable_counter();
+//!     p.core.SYST.enable_counter();
 //! }
 //! 
 //! fn idle() -> ! {
@@ -76,16 +78,23 @@
 //! //
 //! // `r` is the set of resources this task has access to. `SYS_TICK::Resources`
 //! // has one field per resource declared in `app!`.
-//! fn sys_tick(_t: &mut Threshold, r: SYS_TICK::Resources) {
+//! #[allow(unsafe_code)]
+//! fn sys_tick(_t: &mut Threshold, mut r: SYS_TICK::Resources) {
 //!     // toggle state
-//!     **r.ON = !**r.ON;
+//!     *r.ON = !*r.ON;
 //! 
-//!     if **r.ON {
+//!     if *r.ON {
 //!         // set the pin PC13 high
-//!         r.GPIOC.bsrr.write(|w| w.bs13().set());
+//!         // NOTE(unsafe) atomic write to a stateless register
+//!         unsafe {
+//!             (*GPIOC::ptr()).bsrr.write(|w| w.bs13().set());
+//!         }
 //!     } else {
 //!         // set the pin PC13 low
-//!         r.GPIOC.bsrr.write(|w| w.br13().reset());
+//!         // NOTE(unsafe) atomic write to a stateless register
+//!         unsafe {
+//!             (*GPIOC::ptr()).bsrr.write(|w| w.br13().reset());
+//!         }
 //!     }
 //! }
 //! ```

src/examples/_2_two_tasks.rs

@@ -2,6 +2,7 @@
 //!
 //! ```
 //! #![deny(unsafe_code)]
+//! #![deny(warnings)]
 //! #![feature(proc_macro)]
 //! #![no_std]
 //! 
@@ -43,18 +44,18 @@
 //! 
 //! // As both tasks are running at the same priority one can't preempt the other.
 //! // Thus both tasks have direct access to the resource
-//! fn sys_tick(_t: &mut Threshold, r: SYS_TICK::Resources) {
+//! fn sys_tick(_t: &mut Threshold, mut r: SYS_TICK::Resources) {
 //!     // ..
 //! 
-//!     **r.COUNTER += 1;
+//!     *r.COUNTER += 1;
 //! 
 //!     // ..
 //! }
 //! 
-//! fn tim2(_t: &mut Threshold, r: TIM2::Resources) {
+//! fn tim2(_t: &mut Threshold, mut r: TIM2::Resources) {
 //!     // ..
 //! 
-//!     **r.COUNTER += 1;
+//!     *r.COUNTER += 1;
 //! 
 //!     // ..
 //! }

src/examples/_3_preemption.rs

@@ -2,6 +2,7 @@
 //!
 //! ```
 //! #![deny(unsafe_code)]
+//! #![deny(warnings)]
 //! #![feature(proc_macro)]
 //! #![no_std]
 //! 
@@ -43,12 +44,12 @@
 //!     }
 //! }
 //! 
-//! fn sys_tick(_t: &mut Threshold, r: SYS_TICK::Resources) {
+//! fn sys_tick(_t: &mut Threshold, mut r: SYS_TICK::Resources) {
 //!     // ..
 //! 
 //!     // This task can't be preempted by `tim2` so it has direct access to the
 //!     // resource data
-//!     **r.COUNTER += 1;
+//!     *r.COUNTER += 1;
 //! 
 //!     // ..
 //! }
@@ -62,7 +63,7 @@
 //!     // lead to undefined behavior.
 //!     r.COUNTER.claim_mut(t, |counter, _t| {
 //!         // `claim_mut` creates a critical section
-//!         **counter += 1;
+//!         *counter += 1;
 //!     });
 //! 
 //!     // ..

src/examples/_4_nested.rs

@@ -5,6 +5,7 @@
 //!
 //! ```
 //! #![deny(unsafe_code)]
+//! #![deny(warnings)]
 //! #![feature(proc_macro)]
 //! #![no_std]
 //! 

src/examples/_5_late_resources.rs

@@ -1,8 +1,8 @@
 //! Demonstrates initialization of resources in `init`.
 //!
 //! ```
-//! 
 //! #![deny(unsafe_code)]
+//! #![deny(warnings)]
 //! #![feature(proc_macro)]
 //! #![no_std]
 //! 

src/examples/_6_generics.rs

@@ -2,6 +2,7 @@
 //!
 //! ```
 //! #![deny(unsafe_code)]
+//! #![deny(warnings)]
 //! #![feature(proc_macro)]
 //! #![no_std]
 //! 
@@ -14,6 +15,11 @@
 //! app! {
 //!     device: stm32f103xx,
 //! 
+//!     resources: {
+//!         static GPIOA: GPIOA;
+//!         static SPI1: SPI1;
+//!     },
+//! 
 //!     tasks: {
 //!         EXTI0: {
 //!             path: exti0,
@@ -29,7 +35,12 @@
 //!     },
 //! }
 //! 
-//! fn init(_p: init::Peripherals) {}
+//! fn init(p: init::Peripherals) -> init::LateResources {
+//!     init::LateResources {
+//!         GPIOA: p.device.GPIOA,
+//!         SPI1: p.device.SPI1,
+//!     }
+//! }
 //! 
 //! fn idle() -> ! {
 //!     loop {
@@ -61,7 +72,7 @@
 //! 
 //! // This task has direct access to the resources
 //! fn exti1(t: &mut Threshold, r: EXTI1::Resources) {
-//!     work(t, r.GPIOA, r.SPI1);
+//!     work(t, &r.GPIOA, &r.SPI1);
 //! }
 //! ```
 // Auto-generated. Do not modify.

src/examples/_7_full_syntax.rs

@@ -2,6 +2,7 @@
 //!
 //! ```
 //! #![deny(unsafe_code)]
+//! #![deny(warnings)]
 //! #![feature(proc_macro)]
 //! #![no_std]
 //! 
@@ -64,24 +65,24 @@
 //!             *r.OWNED != *r.OWNED;
 //! 
 //!             if *r.OWNED {
-//!                 if r.SHARED.claim(t, |shared, _| **shared) {
+//!                 if r.SHARED.claim(t, |shared, _| *shared) {
 //!                     rtfm::wfi();
 //!                 }
 //!             } else {
-//!                 r.SHARED.claim_mut(t, |shared, _| **shared = !**shared);
+//!                 r.SHARED.claim_mut(t, |shared, _| *shared = !*shared);
 //!             }
 //!         }
 //!     }
 //! }
 //! 
-//! fn sys_tick(_t: &mut Threshold, r: SYS_TICK::Resources) {
+//! fn sys_tick(_t: &mut Threshold, mut r: SYS_TICK::Resources) {
-//!     **r.ON = !**r.ON;
+//!     *r.ON = !*r.ON;
 //! 
-//!     **r.CO_OWNED += 1;
+//!     *r.CO_OWNED += 1;
 //! }
 //! 
-//! fn tim2(_t: &mut Threshold, r: TIM2::Resources) {
+//! fn tim2(_t: &mut Threshold, mut r: TIM2::Resources) {
-//!     **r.CO_OWNED += 1;
+//!     *r.CO_OWNED += 1;
 //! }
 //! ```
 // Auto-generated. Do not modify.

src/lib.rs

@@ -87,11 +87,12 @@ extern crate cortex_m_rtfm_macros;
 extern crate rtfm_core;
 extern crate untagged_option;
 
-use core::u8;
+use core::{mem, u8};
 
-pub use rtfm_core::{Resource, Threshold};
 pub use cortex_m::asm::{bkpt, wfi};
+pub use cortex_m::peripheral::NVIC;
 pub use cortex_m_rtfm_macros::app;
+pub use rtfm_core::{Resource, Threshold};
 #[doc(hidden)]
 pub use untagged_option::UntaggedOption;
 
@@ -165,6 +166,6 @@ where
     I: Nr,
 {
     // NOTE(safe) atomic write
-    let nvic = unsafe { &*cortex_m::peripheral::NVIC::ptr() };
+    let mut nvic: NVIC = unsafe { mem::transmute(()) };
     nvic.set_pending(interrupt);
 }