mirror of
https://github.com/rtic-rs/rtic.git
synced 2024-12-02 00:14:33 +01:00
Added esp32c6 support and example
This commit is contained in:
parent
56a3b9e5c8
commit
69dcb051e0
17 changed files with 1524 additions and 2 deletions
15
examples/esp32c6/.cargo/config.toml
Normal file
15
examples/esp32c6/.cargo/config.toml
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@ -0,0 +1,15 @@
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[target.riscv32imac-unknown-none-elf]
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runner = "espflash flash --monitor"
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[build]
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rustflags = [
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"-C", "link-arg=-Tlinkall.x",
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# Required to obtain backtraces (e.g. when using the "esp-backtrace" crate.)
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# NOTE: May negatively impact performance of produced code
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"-C", "force-frame-pointers",
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]
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target = "riscv32imac-unknown-none-elf"
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[unstable]
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build-std = ["core"]
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917
examples/esp32c6/Cargo.lock
generated
Normal file
917
examples/esp32c6/Cargo.lock
generated
Normal file
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@ -0,0 +1,917 @@
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# This file is automatically @generated by Cargo.
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# It is not intended for manual editing.
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version = 3
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||||
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dependencies = [
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"memchr",
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"serde",
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dependencies = [
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"anyhow",
|
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"enum-as-inner",
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"regex",
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"strum 0.24.1",
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"strum_macros 0.24.3",
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]
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[[package]]
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name = "crc32fast"
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version = "1.4.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "b3855a8a784b474f333699ef2bbca9db2c4a1f6d9088a90a2d25b1eb53111eaa"
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dependencies = [
|
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"cfg-if",
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[[package]]
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[[package]]
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name = "darling"
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||||
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|
||||
checksum = "54e36fcd13ed84ffdfda6f5be89b31287cbb80c439841fe69e04841435464391"
|
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dependencies = [
|
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"darling_core",
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"darling_macro",
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]
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[[package]]
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checksum = "9c2cf1c23a687a1feeb728783b993c4e1ad83d99f351801977dd809b48d0a70f"
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dependencies = [
|
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"fnv",
|
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"ident_case",
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"proc-macro2",
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"quote",
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"strsim",
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"syn 2.0.53",
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[[package]]
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[[package]]
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dependencies = [
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"quote",
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[[package]]
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name = "document-features"
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dependencies = [
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"litrs",
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]
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[[package]]
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name = "embedded-dma"
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dependencies = [
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"stable_deref_trait",
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]
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[[package]]
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name = "embedded-hal"
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dependencies = [
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"nb 0.1.3",
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"void",
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]
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[[package]]
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name = "embedded-hal"
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version = "1.0.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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"heck",
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"quote",
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"syn 1.0.109",
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[[package]]
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"enumset_derive",
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]
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[[package]]
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||||
"darling",
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|
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|
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|
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[[package]]
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name = "equivalent"
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||||
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|
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|
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[[package]]
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name = "esp-backtrace"
|
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version = "0.11.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "dda6c53c50ed96cce44e8565bd7659f8884d55bac3262184c3a77f748553e3ff"
|
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dependencies = [
|
||||
"esp-println",
|
||||
]
|
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|
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[[package]]
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name = "esp-hal"
|
||||
version = "0.16.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "cc3e9b3333d2ae42f5c9b4890e162cb756fb1b067ab5f642b89fc9f29be424fa"
|
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|
||||
"basic-toml",
|
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|
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|
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|
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"critical-section",
|
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"document-features",
|
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"embedded-dma",
|
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"embedded-hal 0.2.7",
|
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"enumset",
|
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"esp-hal-procmacros",
|
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"esp-riscv-rt",
|
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"esp32",
|
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"esp32c2",
|
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"esp32c3",
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"esp32c6",
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"esp32h2",
|
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"esp32p4",
|
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"esp32s2",
|
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"esp32s3",
|
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"fugit",
|
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"nb 1.1.0",
|
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"paste",
|
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"portable-atomic",
|
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"rand_core",
|
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"riscv",
|
||||
"serde",
|
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"strum 0.26.2",
|
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"void",
|
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"xtensa-lx-rt",
|
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]
|
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[[package]]
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name = "esp-hal-procmacros"
|
||||
version = "0.9.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
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|
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dependencies = [
|
||||
"darling",
|
||||
"document-features",
|
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"litrs",
|
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"object",
|
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"proc-macro-crate",
|
||||
"proc-macro-error",
|
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"proc-macro2",
|
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"quote",
|
||||
"syn 2.0.53",
|
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]
|
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|
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[[package]]
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name = "esp-println"
|
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|
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|
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|
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|
||||
[[package]]
|
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name = "esp-riscv-rt"
|
||||
version = "0.7.0"
|
||||
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|
||||
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|
||||
dependencies = [
|
||||
"document-features",
|
||||
"riscv",
|
||||
"riscv-rt-macros",
|
||||
]
|
||||
|
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[[package]]
|
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name = "esp32"
|
||||
version = "0.29.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "343ac30c4537d3f8526490db4264091a9785a55bcdfc22fc34482751a501d8d2"
|
||||
dependencies = [
|
||||
"critical-section",
|
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"vcell",
|
||||
"xtensa-lx",
|
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]
|
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|
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[[package]]
|
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name = "esp32-c6"
|
||||
version = "0.1.0"
|
||||
dependencies = [
|
||||
"esp-backtrace",
|
||||
"esp-hal",
|
||||
"esp-println",
|
||||
"esp32c6",
|
||||
"rtic",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "esp32c2"
|
||||
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|
||||
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|
||||
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|
||||
dependencies = [
|
||||
"critical-section",
|
||||
"vcell",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "esp32c3"
|
||||
version = "0.21.0"
|
||||
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|
||||
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|
||||
dependencies = [
|
||||
"critical-section",
|
||||
"vcell",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "esp32c6"
|
||||
version = "0.12.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "ff0275425ea3a7675b7b5903163a93b65e8ce5b9c8a7749ed397279ed2ade3e3"
|
||||
dependencies = [
|
||||
"critical-section",
|
||||
"vcell",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "esp32h2"
|
||||
version = "0.8.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
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|
||||
dependencies = [
|
||||
"critical-section",
|
||||
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|
||||
]
|
||||
|
||||
[[package]]
|
||||
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|
||||
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|
||||
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|
||||
checksum = "c03c0bc7973e6805e3c3c3c979e9418ba30380d8c16989a477440dbce8cf1965"
|
||||
dependencies = [
|
||||
"critical-section",
|
||||
"vcell",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
"critical-section",
|
||||
"vcell",
|
||||
"xtensa-lx",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "esp32s3"
|
||||
version = "0.24.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "044e216560a33aa5d6c98163c8ae4278845ec3bae7b9cab520da0697be4f23a6"
|
||||
dependencies = [
|
||||
"critical-section",
|
||||
"vcell",
|
||||
"xtensa-lx",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "flate2"
|
||||
version = "1.0.28"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "46303f565772937ffe1d394a4fac6f411c6013172fadde9dcdb1e147a086940e"
|
||||
dependencies = [
|
||||
"crc32fast",
|
||||
"miniz_oxide",
|
||||
]
|
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||||
|
||||
[[package]]
|
||||
name = "toml_edit"
|
||||
version = "0.21.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "6a8534fd7f78b5405e860340ad6575217ce99f38d4d5c8f2442cb5ecb50090e1"
|
||||
dependencies = [
|
||||
"indexmap",
|
||||
"toml_datetime",
|
||||
"winnow",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "twox-hash"
|
||||
version = "1.6.3"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "97fee6b57c6a41524a810daee9286c02d7752c4253064d0b05472833a438f675"
|
||||
dependencies = [
|
||||
"cfg-if",
|
||||
"static_assertions",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "unicode-ident"
|
||||
version = "1.0.12"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b"
|
||||
|
||||
[[package]]
|
||||
name = "vcell"
|
||||
version = "0.1.3"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002"
|
||||
|
||||
[[package]]
|
||||
name = "version_check"
|
||||
version = "0.9.4"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f"
|
||||
|
||||
[[package]]
|
||||
name = "void"
|
||||
version = "1.0.2"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d"
|
||||
|
||||
[[package]]
|
||||
name = "winnow"
|
||||
version = "0.5.40"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "f593a95398737aeed53e489c785df13f3618e41dbcd6718c6addbf1395aa6876"
|
||||
dependencies = [
|
||||
"memchr",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "xtensa-lx"
|
||||
version = "0.9.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "e758f94e1a1f71758f94052a2766dcb12604998eb372b8b2e30576e3ab1ba1e6"
|
||||
dependencies = [
|
||||
"bare-metal",
|
||||
"mutex-trait",
|
||||
"spin",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "xtensa-lx-rt"
|
||||
version = "0.16.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "904102108b780c9a5e3275c5f3c63dc348ec43ae5da5237868515498b447d51a"
|
||||
dependencies = [
|
||||
"bare-metal",
|
||||
"core-isa-parser",
|
||||
"minijinja",
|
||||
"r0",
|
||||
"xtensa-lx-rt-proc-macros",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "xtensa-lx-rt-proc-macros"
|
||||
version = "0.2.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "082cdede098bbec9af15b0e74085e5f3d16f2923597de7aed7b8112003af2da7"
|
||||
dependencies = [
|
||||
"darling",
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"syn 2.0.53",
|
||||
]
|
24
examples/esp32c6/Cargo.toml
Normal file
24
examples/esp32c6/Cargo.toml
Normal file
|
@ -0,0 +1,24 @@
|
|||
[package]
|
||||
name = "esp32-c6"
|
||||
version = "0.1.0"
|
||||
edition = "2021"
|
||||
license = "MIT OR Apache-2.0"
|
||||
|
||||
[workspace]
|
||||
|
||||
[dependencies]
|
||||
rtic = {path = "../../rtic/"}
|
||||
esp-hal = { version = "0.16.1", features = ["esp32c6", "direct-vectoring", "interrupt-preemption"] }
|
||||
esp-backtrace = { version = "0.11.0", features = [
|
||||
"esp32c6",
|
||||
"panic-handler",
|
||||
"exception-handler",
|
||||
"println",
|
||||
] }
|
||||
|
||||
esp32c6 = {version = "0.12.0", features = ["critical-section"]}
|
||||
esp-println = { version = "0.9.0", default-features=false, features = ["esp32c6", "uart"] }
|
||||
|
||||
[features]
|
||||
test-critical-section = []
|
||||
riscv-esp32c6-backend = ["rtic/riscv-esp32c6-backend"]
|
33
examples/esp32c6/README.md
Normal file
33
examples/esp32c6/README.md
Normal file
|
@ -0,0 +1,33 @@
|
|||
### ESP32-C3 RTIC template
|
||||
This crate showcases a simple RTIC application for the ESP32-C6.
|
||||
|
||||
## Prerequisites
|
||||
|
||||
# Nightly Rust
|
||||
The ESP32-C6 HAL requires a nightly build of Rust.
|
||||
Following the example of the (Espressif no_std book)[https://docs.esp-rs.org/no_std-training/02_2_software.html], we use this specific build:
|
||||
```rustup toolchain install nightly-2023-11-14 --component rust-src --target riscv32imac-unknown-none-elf```
|
||||
|
||||
# Espressif toolchain
|
||||
|
||||
This crate uses the most convenient option in ``cargo-espflash`` and ``espflash``
|
||||
```cargo install cargo-espflash espflash```
|
||||
|
||||
## Running the crate
|
||||
|
||||
```cargo run --example sw_and_hw --features=riscv-esp32c6-backend (--release)```
|
||||
|
||||
should do the trick.
|
||||
|
||||
# Expected behavior
|
||||
The program
|
||||
- Prints ``init``
|
||||
- Enters a high prio task
|
||||
- During the execution of the high prio task, the button should be non-functional
|
||||
- Pends a low prio task
|
||||
- Exits the high prio task
|
||||
- Enters the low prio task
|
||||
- During the execution of the low prio task, the button should be functional.
|
||||
- Exits the low prio task
|
||||
- Prints ``idle``
|
||||
|
66
examples/esp32c6/examples/sw_and_hw.rs
Normal file
66
examples/esp32c6/examples/sw_and_hw.rs
Normal file
|
@ -0,0 +1,66 @@
|
|||
#![no_main]
|
||||
#![no_std]
|
||||
|
||||
#[rtic::app(device = esp32c6, dispatchers=[FROM_CPU_INTR0, FROM_CPU_INTR1])]
|
||||
mod app {
|
||||
use esp_backtrace as _;
|
||||
use esp_hal::{
|
||||
gpio::{Event, Gpio9, Input, PullUp, IO},
|
||||
peripherals::Peripherals,
|
||||
prelude::*,
|
||||
};
|
||||
use esp_println::println;
|
||||
#[shared]
|
||||
struct Shared {}
|
||||
|
||||
#[local]
|
||||
struct Local {
|
||||
button: Gpio9<Input<PullUp>>,
|
||||
}
|
||||
|
||||
// do nothing in init
|
||||
#[init]
|
||||
fn init(_: init::Context) -> (Shared, Local) {
|
||||
println!("init");
|
||||
let peripherals = Peripherals::take();
|
||||
let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
|
||||
let mut button = io.pins.gpio9.into_pull_up_input();
|
||||
button.listen(Event::FallingEdge);
|
||||
foo::spawn().unwrap();
|
||||
(Shared {}, Local { button })
|
||||
}
|
||||
|
||||
#[idle()]
|
||||
fn idle(_: idle::Context) -> ! {
|
||||
println!("idle");
|
||||
loop {}
|
||||
}
|
||||
|
||||
#[task(priority = 5)]
|
||||
async fn foo(_: foo::Context) {
|
||||
bar::spawn().unwrap(); //enqueue low prio task
|
||||
println!("Inside high prio task, press button now!");
|
||||
let mut x = 0;
|
||||
while x < 5000000 {
|
||||
x += 1; //burn cycles
|
||||
esp_hal::riscv::asm::nop();
|
||||
}
|
||||
println!("Leaving high prio task.");
|
||||
}
|
||||
#[task(priority = 2)]
|
||||
async fn bar(_: bar::Context) {
|
||||
println!("Inside low prio task, press button now!");
|
||||
let mut x = 0;
|
||||
while x < 5000000 {
|
||||
x += 1; //burn cycles
|
||||
esp_hal::riscv::asm::nop();
|
||||
}
|
||||
println!("Leaving low prio task.");
|
||||
}
|
||||
|
||||
#[task(binds=GPIO, local=[button], priority = 3)]
|
||||
fn gpio_handler(cx: gpio_handler::Context) {
|
||||
cx.local.button.clear_interrupt();
|
||||
println!("button");
|
||||
}
|
||||
}
|
4
examples/esp32c6/rust-toolchain.toml
Normal file
4
examples/esp32c6/rust-toolchain.toml
Normal file
|
@ -0,0 +1,4 @@
|
|||
[toolchain]
|
||||
channel = "nightly-2023-11-14"
|
||||
components = ["rust-src"]
|
||||
targets = ["riscv32imc-unknown-none-elf"]
|
|
@ -34,6 +34,7 @@ default = []
|
|||
cortex-m-source-masking = []
|
||||
cortex-m-basepri = []
|
||||
riscv-esp32c3 = []
|
||||
riscv-esp32c6 = []
|
||||
# riscv-clic = []
|
||||
# riscv-ch32 = []
|
||||
riscv-slic = []
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
feature = "cortex-m-basepri",
|
||||
feature = "test-template",
|
||||
feature = "riscv-esp32c3",
|
||||
feature = "riscv-esp32c6",
|
||||
feature = "riscv-slic",
|
||||
)))]
|
||||
compile_error!("No backend selected");
|
||||
|
@ -25,6 +26,12 @@ pub use esp32c3::*;
|
|||
#[cfg(feature = "riscv-esp32c3")]
|
||||
mod esp32c3;
|
||||
|
||||
#[cfg(feature = "riscv-esp32c6")]
|
||||
pub use esp32c6::*;
|
||||
|
||||
#[cfg(feature = "riscv-esp32c6")]
|
||||
mod esp32c6;
|
||||
|
||||
#[cfg(feature = "riscv-slic")]
|
||||
pub use riscv_slic::*;
|
||||
|
||||
|
|
249
rtic-macros/src/codegen/bindings/esp32c6.rs
Normal file
249
rtic-macros/src/codegen/bindings/esp32c6.rs
Normal file
|
@ -0,0 +1,249 @@
|
|||
#[cfg(feature = "riscv-esp32c6")]
|
||||
pub use esp32c6::*;
|
||||
|
||||
#[cfg(feature = "riscv-esp32c6")]
|
||||
mod esp32c6 {
|
||||
use crate::{
|
||||
analyze::Analysis as CodegenAnalysis,
|
||||
codegen::util,
|
||||
syntax::{analyze::Analysis as SyntaxAnalysis, ast::App},
|
||||
};
|
||||
use proc_macro2::{Span, TokenStream as TokenStream2};
|
||||
use quote::quote;
|
||||
use std::collections::HashSet;
|
||||
use syn::{parse, Attribute, Ident};
|
||||
|
||||
#[allow(clippy::too_many_arguments)]
|
||||
pub fn impl_mutex(
|
||||
_app: &App,
|
||||
_analysis: &CodegenAnalysis,
|
||||
cfgs: &[Attribute],
|
||||
resources_prefix: bool,
|
||||
name: &Ident,
|
||||
ty: &TokenStream2,
|
||||
ceiling: u8,
|
||||
ptr: &TokenStream2,
|
||||
) -> TokenStream2 {
|
||||
let path = if resources_prefix {
|
||||
quote!(shared_resources::#name)
|
||||
} else {
|
||||
quote!(#name)
|
||||
};
|
||||
quote!(
|
||||
#(#cfgs)*
|
||||
impl<'a> rtic::Mutex for #path<'a> {
|
||||
type T = #ty;
|
||||
|
||||
#[inline(always)]
|
||||
fn lock<RTIC_INTERNAL_R>(&mut self, f: impl FnOnce(&mut #ty) -> RTIC_INTERNAL_R) -> RTIC_INTERNAL_R {
|
||||
/// Priority ceiling
|
||||
const CEILING: u8 = #ceiling;
|
||||
unsafe {
|
||||
rtic::export::lock(
|
||||
#ptr,
|
||||
CEILING,
|
||||
f,
|
||||
)
|
||||
}
|
||||
}
|
||||
}
|
||||
)
|
||||
}
|
||||
|
||||
pub fn interrupt_ident() -> Ident {
|
||||
let span = Span::call_site();
|
||||
Ident::new("Interrupt", span)
|
||||
}
|
||||
|
||||
pub fn interrupt_mod(app: &App) -> TokenStream2 {
|
||||
let device = &app.args.device;
|
||||
let interrupt = interrupt_ident();
|
||||
quote!(#device::#interrupt)
|
||||
}
|
||||
|
||||
pub fn extra_assertions(_: &App, _: &SyntaxAnalysis) -> Vec<TokenStream2> {
|
||||
vec![]
|
||||
}
|
||||
|
||||
pub fn pre_init_preprocessing(_app: &mut App, _analysis: &SyntaxAnalysis) -> parse::Result<()> {
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub fn pre_init_checks(app: &App, _: &SyntaxAnalysis) -> Vec<TokenStream2> {
|
||||
let mut stmts = vec![];
|
||||
// check that all dispatchers exists in the `Interrupt` enumeration regardless of whether
|
||||
// they are used or not
|
||||
let rt_err = util::rt_err_ident();
|
||||
|
||||
for name in app.args.dispatchers.keys() {
|
||||
stmts.push(quote!(let _ = #rt_err::Interrupt::#name;));
|
||||
}
|
||||
stmts
|
||||
}
|
||||
pub fn pre_init_enable_interrupts(app: &App, analysis: &CodegenAnalysis) -> Vec<TokenStream2> {
|
||||
let mut stmts = vec![];
|
||||
let mut curr_cpu_id: u8 = 1; //cpu interrupt id 0 is reserved
|
||||
let rt_err = util::rt_err_ident();
|
||||
let max_prio: usize = 15; //unfortunately this is not part of pac, but we know that max prio is 15.
|
||||
let interrupt_ids = analysis.interrupts.iter().map(|(p, (id, _))| (p, id));
|
||||
// Unmask interrupts and set their priorities
|
||||
for (&priority, name) in interrupt_ids.chain(
|
||||
app.hardware_tasks
|
||||
.values()
|
||||
.filter_map(|task| Some((&task.args.priority, &task.args.binds))),
|
||||
) {
|
||||
let es = format!(
|
||||
"Maximum priority used by interrupt vector '{name}' is more than supported by hardware"
|
||||
);
|
||||
// Compile time assert that this priority is supported by the device
|
||||
stmts.push(quote!(
|
||||
const _: () = if (#max_prio) <= #priority as usize { ::core::panic!(#es); };
|
||||
));
|
||||
stmts.push(quote!(
|
||||
rtic::export::enable(
|
||||
#rt_err::Interrupt::#name,
|
||||
#priority,
|
||||
#curr_cpu_id,
|
||||
);
|
||||
));
|
||||
curr_cpu_id += 1;
|
||||
}
|
||||
stmts
|
||||
}
|
||||
|
||||
pub fn architecture_specific_analysis(
|
||||
app: &App,
|
||||
_analysis: &SyntaxAnalysis,
|
||||
) -> parse::Result<()> {
|
||||
//check if the dispatchers are supported
|
||||
for name in app.args.dispatchers.keys() {
|
||||
let name_s = name.to_string();
|
||||
match &*name_s {
|
||||
"FROM_CPU_INTR0" | "FROM_CPU_INTR1" | "FROM_CPU_INTR2" | "FROM_CPU_INTR3" => {}
|
||||
|
||||
_ => {
|
||||
return Err(parse::Error::new(
|
||||
name.span(),
|
||||
"Only FROM_CPU_INTRX are supported as dispatchers",
|
||||
));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Check that there are enough external interrupts to dispatch the software tasks and the timer
|
||||
// queue handler
|
||||
let mut first = None;
|
||||
let priorities = app
|
||||
.software_tasks
|
||||
.iter()
|
||||
.map(|(name, task)| {
|
||||
first = Some(name);
|
||||
task.args.priority
|
||||
})
|
||||
.filter(|prio| *prio > 0)
|
||||
.collect::<HashSet<_>>();
|
||||
|
||||
let need = priorities.len();
|
||||
let given = app.args.dispatchers.len();
|
||||
if need > given {
|
||||
let s = {
|
||||
format!(
|
||||
"not enough interrupts to dispatch \
|
||||
all software tasks (need: {need}; given: {given})"
|
||||
)
|
||||
};
|
||||
|
||||
// If not enough tasks and first still is None, may cause
|
||||
// "custom attribute panicked" due to unwrap on None
|
||||
return Err(parse::Error::new(first.unwrap().span(), s));
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub fn interrupt_entry(_app: &App, _analysis: &CodegenAnalysis) -> Vec<TokenStream2> {
|
||||
vec![]
|
||||
}
|
||||
|
||||
pub fn interrupt_exit(_app: &App, _analysis: &CodegenAnalysis) -> Vec<TokenStream2> {
|
||||
vec![]
|
||||
}
|
||||
|
||||
pub fn check_stack_overflow_before_init(
|
||||
_app: &App,
|
||||
_analysis: &CodegenAnalysis,
|
||||
) -> Vec<TokenStream2> {
|
||||
vec![quote!(
|
||||
// Check for stack overflow using symbols from `risc-v-rt`.
|
||||
extern "C" {
|
||||
pub static _stack_start: u32;
|
||||
pub static _bss_end: u32;
|
||||
}
|
||||
|
||||
let stack_start = &_stack_start as *const _ as u32;
|
||||
let ebss = &_bss_end as *const _ as u32;
|
||||
|
||||
if stack_start > ebss {
|
||||
// No flip-link usage, check the SP for overflow.
|
||||
if rtic::export::read_sp() <= ebss {
|
||||
panic!("Stack overflow after allocating executors");
|
||||
}
|
||||
}
|
||||
)]
|
||||
}
|
||||
|
||||
pub fn async_entry(
|
||||
_app: &App,
|
||||
_analysis: &CodegenAnalysis,
|
||||
dispatcher_name: Ident,
|
||||
) -> Vec<TokenStream2> {
|
||||
let mut stmts = vec![];
|
||||
stmts.push(quote!(
|
||||
rtic::export::unpend(rtic::export::Interrupt::#dispatcher_name); //simulate cortex-m behavior by unpending the interrupt on entry.
|
||||
));
|
||||
stmts
|
||||
}
|
||||
|
||||
pub fn async_prio_limit(app: &App, analysis: &CodegenAnalysis) -> Vec<TokenStream2> {
|
||||
let max = if let Some(max) = analysis.max_async_prio {
|
||||
quote!(#max)
|
||||
} else {
|
||||
// No limit
|
||||
let device = &app.args.device;
|
||||
quote!(1 << #device::NVIC_PRIO_BITS)
|
||||
};
|
||||
|
||||
vec![quote!(
|
||||
/// Holds the maximum priority level for use by async HAL drivers.
|
||||
#[no_mangle]
|
||||
static RTIC_ASYNC_MAX_LOGICAL_PRIO: u8 = #max;
|
||||
)]
|
||||
}
|
||||
pub fn handler_config(
|
||||
app: &App,
|
||||
analysis: &CodegenAnalysis,
|
||||
dispatcher_name: Ident,
|
||||
) -> Vec<TokenStream2> {
|
||||
let mut stmts = vec![];
|
||||
let mut curr_cpu_id = 1;
|
||||
//let mut ret = "";
|
||||
let interrupt_ids = analysis.interrupts.iter().map(|(p, (id, _))| (p, id));
|
||||
for (_, name) in interrupt_ids.chain(
|
||||
app.hardware_tasks
|
||||
.values()
|
||||
.filter_map(|task| Some((&task.args.priority, &task.args.binds))),
|
||||
) {
|
||||
if *name == dispatcher_name {
|
||||
let ret = &("cpu_int_".to_owned() + &curr_cpu_id.to_string() + "_handler");
|
||||
stmts.push(quote!(#[export_name = #ret]));
|
||||
}
|
||||
curr_cpu_id += 1;
|
||||
}
|
||||
|
||||
stmts
|
||||
}
|
||||
|
||||
pub fn extra_modules(_app: &App, _analysis: &SyntaxAnalysis) -> Vec<TokenStream2> {
|
||||
vec![]
|
||||
}
|
||||
}
|
||||
|
|
@ -15,6 +15,7 @@ macro_rules! with_backend {
|
|||
feature = "cortex-m-basepri",
|
||||
feature = "test-template",
|
||||
feature = "riscv-esp32c3",
|
||||
feature = "riscv-esp32c6",
|
||||
feature = "riscv-slic",
|
||||
))]
|
||||
$($tokens)*
|
||||
|
@ -118,6 +119,7 @@ with_backend! {
|
|||
feature = "cortex-m-basepri",
|
||||
feature = "test-template",
|
||||
feature = "riscv-esp32c3",
|
||||
feature = "riscv-esp32c6",
|
||||
feature = "riscv-slic",
|
||||
)))]
|
||||
compile_error!("Cannot compile. No backend feature selected.");
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
feature = "cortex-m-basepri",
|
||||
feature = "test-template",
|
||||
feature = "riscv-esp32c3",
|
||||
feature = "riscv-esp32c6",
|
||||
feature = "riscv-slic",
|
||||
)))]
|
||||
compile_error!("No backend selected");
|
||||
|
@ -16,6 +17,9 @@ pub use template::*;
|
|||
#[cfg(feature = "riscv-esp32c3")]
|
||||
pub use esp32c3::*;
|
||||
|
||||
#[cfg(feature = "riscv-esp32c6")]
|
||||
pub use esp32c6::*;
|
||||
|
||||
#[cfg(feature = "riscv-slic")]
|
||||
pub use riscv_slic::*;
|
||||
|
||||
|
@ -28,5 +32,8 @@ mod template;
|
|||
#[cfg(feature = "riscv-esp32c3")]
|
||||
mod esp32c3;
|
||||
|
||||
#[cfg(feature = "riscv-esp32c6")]
|
||||
mod esp32c6;
|
||||
|
||||
#[cfg(feature = "riscv-slic")]
|
||||
mod riscv_slic;
|
||||
|
|
16
rtic-macros/src/syntax/backend/esp32c6.rs
Normal file
16
rtic-macros/src/syntax/backend/esp32c6.rs
Normal file
|
@ -0,0 +1,16 @@
|
|||
use syn::{
|
||||
parse::{Parse, ParseStream},
|
||||
Error, Result,
|
||||
};
|
||||
|
||||
#[derive(Debug)]
|
||||
pub struct BackendArgs();
|
||||
|
||||
impl Parse for BackendArgs {
|
||||
fn parse(input: ParseStream) -> Result<Self> {
|
||||
Err(Error::new(
|
||||
input.span(),
|
||||
"esp32c6 backend does not accept any arguments",
|
||||
))
|
||||
}
|
||||
}
|
|
@ -27,6 +27,7 @@ name = "rtic"
|
|||
[dependencies]
|
||||
riscv-slic = { git = "https://github.com/romancardenas/riscv-slic.git", rev = "2a91edb", optional = true }
|
||||
esp32c3 = { version = "0.21.0", optional = true }
|
||||
esp32c6 = { version = "0.12.0", optional = true }
|
||||
riscv = { version = "0.11.0", optional = true }
|
||||
cortex-m = { version = "0.7.0", optional = true }
|
||||
bare-metal = "1.0.0"
|
||||
|
@ -62,6 +63,7 @@ thumbv8main-backend = ["cortex-m", "rtic-macros/cortex-m-basepri"]
|
|||
# riscv-clic-backend = ["rtic-macros/riscv-clic"]
|
||||
# riscv-ch32-backend = ["rtic-macros/riscv-ch32"]
|
||||
riscv-esp32c3-backend = ["esp32c3", "riscv", "rtic-macros/riscv-esp32c3"]
|
||||
riscv-esp32c6-backend = ["esp32c6", "riscv", "rtic-macros/riscv-esp32c6"]
|
||||
riscv-clint-backend = [
|
||||
"riscv",
|
||||
"riscv-slic/clint-backend",
|
||||
|
|
|
@ -27,6 +27,9 @@ fn main() {
|
|||
"riscv-esp32c3-backend" => {
|
||||
println!("cargo:rustc-cfg=feature=\"riscv-esp32c3\"");
|
||||
}
|
||||
"riscv-esp32c6-backend" => {
|
||||
println!("cargo:rustc-cfg=feature=\"riscv-esp32c6\"");
|
||||
}
|
||||
"riscv-clint-backend" => {
|
||||
println!("cargo:rustc-cfg=feature=\"riscv-slic\"");
|
||||
}
|
||||
|
|
|
@ -36,6 +36,11 @@ mod riscv_esp32c3;
|
|||
#[cfg(feature = "riscv-esp32c3")]
|
||||
pub use riscv_esp32c3::*;
|
||||
|
||||
#[cfg(feature = "riscv-esp32c6")]
|
||||
mod riscv_esp32c6;
|
||||
#[cfg(feature = "riscv-esp32c6")]
|
||||
pub use riscv_esp32c6::*;
|
||||
|
||||
#[cfg(feature = "riscv-slic")]
|
||||
mod slic;
|
||||
#[cfg(feature = "riscv-slic")]
|
||||
|
|
161
rtic/src/export/riscv_esp32c6.rs
Normal file
161
rtic/src/export/riscv_esp32c6.rs
Normal file
|
@ -0,0 +1,161 @@
|
|||
use esp32c6::INTPRI; //priority threshold control
|
||||
pub use esp32c6::{Interrupt, Peripherals};
|
||||
pub use riscv::interrupt;
|
||||
pub use riscv::register::mcause; //low level interrupt enable/disable
|
||||
|
||||
#[cfg(all(feature = "riscv-esp32c6", not(feature = "riscv-esp32c6-backend")))]
|
||||
compile_error!("Building for the esp32c6, but 'riscv-esp32c6-backend not selected'");
|
||||
|
||||
#[inline(always)]
|
||||
pub fn run<F>(priority: u8, f: F)
|
||||
where
|
||||
F: FnOnce(),
|
||||
{
|
||||
if priority == 1 {
|
||||
//if priority is 1, priority thresh should be 1
|
||||
f();
|
||||
unsafe {
|
||||
(*INTPRI::ptr())
|
||||
.cpu_int_thresh()
|
||||
.write(|w| w.cpu_int_thresh().bits(1));
|
||||
}
|
||||
} else {
|
||||
//read current thresh
|
||||
let initial = unsafe {
|
||||
(*INTPRI::ptr())
|
||||
.cpu_int_thresh()
|
||||
.read()
|
||||
.cpu_int_thresh()
|
||||
.bits()
|
||||
};
|
||||
f();
|
||||
//write back old thresh
|
||||
unsafe {
|
||||
(*INTPRI::ptr())
|
||||
.cpu_int_thresh()
|
||||
.write(|w| w.cpu_int_thresh().bits(initial));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// Lock implementation using threshold and global Critical Section (CS)
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// The system ceiling is raised from current to ceiling
|
||||
/// by either
|
||||
/// - raising the threshold to the ceiling value, or
|
||||
/// - disable all interrupts in case we want to
|
||||
/// mask interrupts with maximum priority
|
||||
///
|
||||
/// Dereferencing a raw pointer inside CS
|
||||
///
|
||||
/// The priority.set/priority.get can safely be outside the CS
|
||||
/// as being a context local cell (not affected by preemptions).
|
||||
/// It is merely used in order to omit masking in case current
|
||||
/// priority is current priority >= ceiling.
|
||||
#[inline(always)]
|
||||
pub unsafe fn lock<T, R>(ptr: *mut T, ceiling: u8, f: impl FnOnce(&mut T) -> R) -> R {
|
||||
if ceiling == (15) {
|
||||
//turn off interrupts completely, were at max prio
|
||||
let r = critical_section::with(|_| f(&mut *ptr));
|
||||
r
|
||||
} else {
|
||||
let current = unsafe {
|
||||
(*INTPRI::ptr())
|
||||
.cpu_int_thresh()
|
||||
.read()
|
||||
.cpu_int_thresh()
|
||||
.bits()
|
||||
};
|
||||
|
||||
unsafe {
|
||||
(*INTPRI::ptr())
|
||||
.cpu_int_thresh()
|
||||
.write(|w| w.cpu_int_thresh().bits(ceiling + 1))
|
||||
} //esp32c6 lets interrupts with prio equal to threshold through so we up it by one
|
||||
let r = f(&mut *ptr);
|
||||
unsafe {
|
||||
(*INTPRI::ptr())
|
||||
.cpu_int_thresh()
|
||||
.write(|w| w.cpu_int_thresh().bits(current))
|
||||
}
|
||||
r
|
||||
}
|
||||
}
|
||||
|
||||
/// Sets the given software interrupt as pending
|
||||
#[inline(always)]
|
||||
pub fn pend(int: Interrupt) {
|
||||
unsafe {
|
||||
let peripherals = Peripherals::steal();
|
||||
match int {
|
||||
Interrupt::FROM_CPU_INTR0 => peripherals
|
||||
.INTPRI
|
||||
.cpu_intr_from_cpu_0()
|
||||
.write(|w| w.cpu_intr_from_cpu_0().bit(true)),
|
||||
Interrupt::FROM_CPU_INTR1 => peripherals
|
||||
.INTPRI
|
||||
.cpu_intr_from_cpu_1()
|
||||
.write(|w| w.cpu_intr_from_cpu_1().bit(true)),
|
||||
Interrupt::FROM_CPU_INTR2 => peripherals
|
||||
.INTPRI
|
||||
.cpu_intr_from_cpu_2()
|
||||
.write(|w| w.cpu_intr_from_cpu_2().bit(true)),
|
||||
Interrupt::FROM_CPU_INTR3 => peripherals
|
||||
.INTPRI
|
||||
.cpu_intr_from_cpu_3()
|
||||
.write(|w| w.cpu_intr_from_cpu_3().bit(true)),
|
||||
_ => panic!("Unsupported software interrupt"), //should never happen, checked at compile time
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Sets the given software interrupt as not pending
|
||||
pub fn unpend(int: Interrupt) {
|
||||
unsafe {
|
||||
let peripherals = Peripherals::steal();
|
||||
match int {
|
||||
Interrupt::FROM_CPU_INTR0 => peripherals
|
||||
.INTPRI
|
||||
.cpu_intr_from_cpu_0()
|
||||
.write(|w| w.cpu_intr_from_cpu_0().bit(false)),
|
||||
Interrupt::FROM_CPU_INTR1 => peripherals
|
||||
.INTPRI
|
||||
.cpu_intr_from_cpu_1()
|
||||
.write(|w| w.cpu_intr_from_cpu_1().bit(false)),
|
||||
Interrupt::FROM_CPU_INTR2 => peripherals
|
||||
.INTPRI
|
||||
.cpu_intr_from_cpu_2()
|
||||
.write(|w| w.cpu_intr_from_cpu_2().bit(false)),
|
||||
Interrupt::FROM_CPU_INTR3 => peripherals
|
||||
.INTPRI
|
||||
.cpu_intr_from_cpu_3()
|
||||
.write(|w| w.cpu_intr_from_cpu_3().bit(false)),
|
||||
_ => panic!("Unsupported software interrupt"),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub fn enable(int: Interrupt, prio: u8, cpu_int_id: u8) {
|
||||
const INTERRUPT_MAP_BASE: u32 = 0x60010000;
|
||||
let interrupt_number = int as isize;
|
||||
let cpu_interrupt_number = cpu_int_id as isize;
|
||||
|
||||
unsafe {
|
||||
let intr_map_base = INTERRUPT_MAP_BASE as *mut u32;
|
||||
intr_map_base
|
||||
.offset(interrupt_number)
|
||||
.write_volatile(cpu_interrupt_number as u32);
|
||||
//map peripheral interrupt to CPU interrupt
|
||||
(*INTPRI::ptr())
|
||||
.cpu_int_enable()
|
||||
.modify(|r, w| w.bits((1 << cpu_interrupt_number) | r.bits())); //enable the CPU interupt.
|
||||
let intr = INTPRI::ptr();
|
||||
let intr_prio_base = (*intr).cpu_int_pri_0().as_ptr();
|
||||
|
||||
intr_prio_base
|
||||
.offset(cpu_interrupt_number)
|
||||
.write_volatile(prio as u32);
|
||||
}
|
||||
}
|
|
@ -154,6 +154,7 @@ pub enum Backends {
|
|||
Thumbv8Base,
|
||||
Thumbv8Main,
|
||||
RiscvEsp32C3,
|
||||
RiscvEsp32C6,
|
||||
Riscv32ImcClint, // not working yet (issues with portable-atomic features...)
|
||||
Riscv32ImacClint,
|
||||
}
|
||||
|
@ -167,7 +168,7 @@ impl Backends {
|
|||
Backends::Thumbv8Base => ARMV8MBASE,
|
||||
Backends::Thumbv8Main => ARMV8MMAIN,
|
||||
Backends::Riscv32ImcClint | Backends::RiscvEsp32C3 => RISCV32IMC,
|
||||
Backends::Riscv32ImacClint => RISCV32IMAC,
|
||||
Backends::Riscv32ImacClint | Backends::RiscvEsp32C6 => RISCV32IMAC,
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -179,6 +180,7 @@ impl Backends {
|
|||
Backends::Thumbv8Base => "thumbv8base-backend",
|
||||
Backends::Thumbv8Main => "thumbv8main-backend",
|
||||
Backends::RiscvEsp32C3 => "riscv-esp32c3-backend",
|
||||
Backends::RiscvEsp32C6 => "riscv-esp32c6-backend",
|
||||
Backends::Riscv32ImcClint | Backends::Riscv32ImacClint => "riscv-clint-backend",
|
||||
}
|
||||
}
|
||||
|
@ -188,6 +190,7 @@ impl Backends {
|
|||
Backends::Thumbv6 | Backends::Thumbv8Base => "cortex-m-source-masking",
|
||||
Backends::Thumbv7 | Backends::Thumbv8Main => "cortex-m-basepri",
|
||||
Backends::RiscvEsp32C3 => "riscv-esp32c3",
|
||||
Backends::RiscvEsp32C6 => "riscv-esp32c6",
|
||||
Backends::Riscv32ImcClint | Backends::Riscv32ImacClint => "riscv-clint",
|
||||
}
|
||||
}
|
||||
|
@ -203,6 +206,7 @@ pub enum BuildOrCheck {
|
|||
#[derive(clap::ValueEnum, Copy, Clone, Default, Debug)]
|
||||
pub enum Platforms {
|
||||
Esp32C3,
|
||||
Esp32C6,
|
||||
Hifive1,
|
||||
#[default]
|
||||
Lm3s6965,
|
||||
|
@ -217,6 +221,7 @@ impl Platforms {
|
|||
pub fn name(&self) -> String {
|
||||
let name = match self {
|
||||
Platforms::Esp32C3 => "esp32c3",
|
||||
Platforms::Esp32C6 => "esp32c6",
|
||||
Platforms::Hifive1 => "hifive1",
|
||||
Platforms::Lm3s6965 => "lm3s6965",
|
||||
Platforms::Nrf52840 => "nrf52840",
|
||||
|
@ -232,7 +237,7 @@ impl Platforms {
|
|||
pub fn rust_flags(&self) -> Vec<String> {
|
||||
let c = "-C".to_string();
|
||||
match self {
|
||||
Platforms::Esp32C3 => vec![c, "link-arg=-Tlinkall.x".to_string()],
|
||||
Platforms::Esp32C3 | Platforms::Esp32C6 => vec![c, "link-arg=-Tlinkall.x".to_string()],
|
||||
Platforms::Hifive1 => vec![c, "link-arg=-Thifive1-link.x".to_string()],
|
||||
Platforms::Lm3s6965 => vec![c, "link-arg=-Tlink.x".to_string()],
|
||||
Platforms::Nrf52840 => vec![
|
||||
|
@ -271,6 +276,7 @@ impl Platforms {
|
|||
pub fn default_backend(&self) -> Backends {
|
||||
match self {
|
||||
Platforms::Esp32C3 => Backends::RiscvEsp32C3,
|
||||
Platforms::Esp32C6 => Backends::RiscvEsp32C6,
|
||||
Platforms::Hifive1 => Backends::Riscv32ImcClint,
|
||||
Platforms::Lm3s6965 => Backends::Thumbv7,
|
||||
Platforms::Nrf52840 => unimplemented!(),
|
||||
|
@ -290,6 +296,10 @@ impl Platforms {
|
|||
RISCV32IMC => Ok(None),
|
||||
_ => Err(()),
|
||||
},
|
||||
Platforms::Esp32C6 => match backend.to_target() {
|
||||
RISCV32IMAC => Ok(None),
|
||||
_ => Err(()),
|
||||
},
|
||||
Platforms::Hifive1 => match backend.to_target() {
|
||||
RISCV32IMC | RISCV32IMAC => Ok(None),
|
||||
_ => Err(()),
|
||||
|
|
Loading…
Reference in a new issue