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work around Cortex-M7 BASEPRI erratum
This commit is contained in:
parent
8a396c51f2
commit
ca395922e6
2 changed files with 21 additions and 2 deletions
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@ -181,6 +181,7 @@ fn idle(app: &App, ownerships: &Ownerships, main: &mut Vec<Tokens>, root: &mut V
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&#_static,
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&#_static,
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#ceiling,
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#ceiling,
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#device::NVIC_PRIO_BITS,
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#device::NVIC_PRIO_BITS,
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#device::CPU,
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t,
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t,
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f,
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f,
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)
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)
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@ -196,6 +197,7 @@ fn idle(app: &App, ownerships: &Ownerships, main: &mut Vec<Tokens>, root: &mut V
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&mut #_static,
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&mut #_static,
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#ceiling,
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#ceiling,
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#device::NVIC_PRIO_BITS,
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#device::NVIC_PRIO_BITS,
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#device::CPU,
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t,
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t,
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f,
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f,
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)
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)
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@ -499,6 +501,7 @@ fn tasks(app: &App, ownerships: &Ownerships, root: &mut Vec<Tokens>) {
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&#_static,
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&#_static,
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#ceiling,
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#ceiling,
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#device::NVIC_PRIO_BITS,
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#device::NVIC_PRIO_BITS,
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#device::CPU,
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t,
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t,
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f,
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f,
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)
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)
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@ -514,6 +517,7 @@ fn tasks(app: &App, ownerships: &Ownerships, root: &mut Vec<Tokens>) {
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&mut #_static,
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&mut #_static,
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#ceiling,
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#ceiling,
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#device::NVIC_PRIO_BITS,
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#device::NVIC_PRIO_BITS,
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#device::CPU,
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t,
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t,
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f,
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f,
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)
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)
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19
src/lib.rs
19
src/lib.rs
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@ -74,6 +74,7 @@
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//! [rtfm]: http://www.diva-portal.org/smash/get/diva2:1005680/FULLTEXT01.pdf
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//! [rtfm]: http://www.diva-portal.org/smash/get/diva2:1005680/FULLTEXT01.pdf
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#![deny(missing_docs)]
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#![deny(missing_docs)]
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#![deny(warnings)]
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#![deny(warnings)]
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#![feature(asm)]
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#![feature(proc_macro)]
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#![feature(proc_macro)]
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#![no_std]
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#![no_std]
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@ -119,6 +120,7 @@ pub unsafe fn claim<T, R, F>(
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data: T,
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data: T,
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ceiling: u8,
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ceiling: u8,
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_nvic_prio_bits: u8,
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_nvic_prio_bits: u8,
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_cpu: &str,
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t: &mut Threshold,
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t: &mut Threshold,
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f: F,
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f: F,
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) -> R
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) -> R
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@ -132,6 +134,7 @@ where
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#[cfg(not(armv6m))]
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#[cfg(not(armv6m))]
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() => {
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() => {
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let is_cm7 = _cpu == "CM7";
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let max_priority = 1 << _nvic_prio_bits;
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let max_priority = 1 << _nvic_prio_bits;
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if ceiling == max_priority {
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if ceiling == max_priority {
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@ -139,9 +142,21 @@ where
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} else {
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} else {
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let old = basepri::read();
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let old = basepri::read();
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let hw = (max_priority - ceiling) << (8 - _nvic_prio_bits);
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let hw = (max_priority - ceiling) << (8 - _nvic_prio_bits);
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basepri::write(hw);
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if is_cm7 {
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asm!("cpsid i
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msr BASEPRI, $0
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cpsie i" :: "r"(hw) : "memory" : "volatile");
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} else {
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basepri::write(hw);
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}
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let ret = f(data, &mut Threshold::new(ceiling));
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let ret = f(data, &mut Threshold::new(ceiling));
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basepri::write(old);
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if is_cm7 {
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asm!("cpsid i
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msr BASEPRI, $0
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cpsie i" :: "r"(old) : "memory" : "volatile");
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} else {
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basepri::write(old);
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}
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ret
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ret
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}
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}
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}
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}
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