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https://github.com/rtic-rs/rtic.git
synced 2024-11-29 15:04:32 +01:00
Fix thumbv7 soundness issue in the lock implementation
The old lock implementation did not set basepri to max(current ceiling, resource ceiling), it simply set basepri to the resource ceiling.
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4 changed files with 96 additions and 2 deletions
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@ -13,6 +13,7 @@ For each category, *Added*, *Changed*, *Fixed* add new entries at the top!
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### Fixed
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### Fixed
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- **Soundness fix:** `thumbv7` was subject to priority inversion.
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- **Soundness fix:** Monotonics did not wait long enough in `Duration` based delays.
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- **Soundness fix:** Monotonics did not wait long enough in `Duration` based delays.
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This is not directly a change for `rtic`, but required bumping the minimal version of `rtic-monotonics`.
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This is not directly a change for `rtic`, but required bumping the minimal version of `rtic-monotonics`.
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6
rtic/ci/expected/prio-inversion.run
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6
rtic/ci/expected/prio-inversion.run
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@ -0,0 +1,6 @@
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foo - start
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pre baz spawn 0 0
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post baz spawn 0 0
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baz - start
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baz - end
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foo - end
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87
rtic/examples/prio-inversion.rs
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87
rtic/examples/prio-inversion.rs
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@ -0,0 +1,87 @@
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//! examples/prio-inversion.rs
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//!
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//! Here we test to make sure we don't have priority inversion.
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#![no_main]
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#![no_std]
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#![deny(warnings)]
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#![deny(unsafe_code)]
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#![deny(missing_docs)]
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#![feature(type_alias_impl_trait)]
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use panic_semihosting as _;
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use rtic::app;
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// t1 p1 use b, a
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// t2 p2 use a
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// t3 p3
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// t4 p4 use b
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//
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// so t1 start , take b take a, pend t3
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// t3 should not start
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// try to see if it starts, IT SHOULD NOT
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#[app(device = lm3s6965, dispatchers = [SSI0, QEI0, GPIOA, GPIOB])]
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mod app {
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use cortex_m_semihosting::{debug, hprintln};
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#[shared]
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struct Shared {
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a: u32,
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b: u32,
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}
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#[local]
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struct Local {}
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#[init]
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fn init(_: init::Context) -> (Shared, Local) {
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foo::spawn().unwrap();
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(Shared { a: 0, b: 0 }, Local {})
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}
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#[task(priority = 1, shared = [a, b])]
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async fn foo(cx: foo::Context) {
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let foo::SharedResources { mut a, mut b, .. } = cx.shared;
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hprintln!("foo - start");
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// basepri = 0
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b.lock(|b| {
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// basepri = max(basepri = 0, ceil(b) = 4) = 4
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a.lock(|a| {
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// basepri = max(basepri = 4, ceil(a) = 2) = 4
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hprintln!("pre baz spawn {} {}", a, b);
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// This spawn should be blocked as prio(baz) = 3
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baz::spawn().unwrap();
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hprintln!("post baz spawn {} {}", a, b);
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});
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// basepri = 4
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});
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// basepri = 0
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hprintln!("foo - end");
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debug::exit(debug::EXIT_SUCCESS); // Exit QEMU simulator
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}
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#[task(priority = 2, shared = [a])]
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async fn bar(_: bar::Context) {
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hprintln!(" bar");
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}
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#[task(priority = 3)]
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async fn baz(_: baz::Context) {
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hprintln!(" baz - start");
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hprintln!(" baz - end");
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}
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#[task(priority = 4, shared = [b])]
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async fn pow(_: pow::Context) {
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hprintln!(" pow - start");
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hprintln!(" pow - end");
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}
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}
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@ -1,5 +1,5 @@
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use super::cortex_logical2hw;
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use super::cortex_logical2hw;
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use cortex_m::register::basepri;
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use cortex_m::register::{basepri, basepri_max};
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pub use cortex_m::{
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pub use cortex_m::{
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asm::wfi,
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asm::wfi,
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interrupt,
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interrupt,
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@ -73,7 +73,7 @@ pub unsafe fn lock<T, R>(
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critical_section::with(|_| f(&mut *ptr))
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critical_section::with(|_| f(&mut *ptr))
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} else {
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} else {
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let current = basepri::read();
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let current = basepri::read();
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basepri::write(cortex_logical2hw(ceiling, nvic_prio_bits));
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basepri_max::write(cortex_logical2hw(ceiling, nvic_prio_bits));
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let r = f(&mut *ptr);
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let r = f(&mut *ptr);
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basepri::write(current);
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basepri::write(current);
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r
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r
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