diff --git a/rtic-monotonics/Cargo.toml b/rtic-monotonics/Cargo.toml
index 3f157d4de7..1b62aec4cf 100644
--- a/rtic-monotonics/Cargo.toml
+++ b/rtic-monotonics/Cargo.toml
@@ -118,7 +118,7 @@ imxrt_gpt2 = ["imxrt"]
 esp32c3-systimer = ["dep:esp32c3", "dep:riscv"]
 
 # ATSAMD21 Timer
-atsamd21g = ["dep:atsamd21g"]
+atsamd21g = ["dep:cortex-m", "dep:atsamd21g"]
 
 
 # STM32 timers
diff --git a/rtic-monotonics/src/atsamd21.rs b/rtic-monotonics/src/atsamd21.rs
index 2ac4272864..d258b13a8e 100644
--- a/rtic-monotonics/src/atsamd21.rs
+++ b/rtic-monotonics/src/atsamd21.rs
@@ -25,14 +25,6 @@
 //!          Mono::delay(100.millis()).await;
 //!     }
 //! }
-//!
-//! // FIXME: the interrupt handler is not working, but re-implementing it in a RTIC task does
-//! // Comment the interrupt handler `unsafe extern "C" fn TC4()` and add the following RTIC task
-//! #[task(binds = TC4)]
-//! fn tc4(_cx: tc4::Context) {
-//!     use rtic_time::timer_queue::TimerQueueBackend;
-//!     unsafe { Tc4Tc5Backend::timer_queue().on_monotonic_interrupt() };
-//! }
 //! ```
 
 /// Common definitions and traits for using the ATSAMD21 TC4/5 monotonic
@@ -114,6 +106,11 @@ impl Tc4Tc5Backend {
         // Enable the timer
         tc4.ctrla().modify(|_, w| w.enable().set_bit());
         Self::sync();
+
+        unsafe {
+            crate::set_monotonic_prio(pac::NVIC_PRIO_BITS, pac::Interrupt::TC4);
+            pac::NVIC::unmask(pac::Interrupt::TC4);
+        }
     }
 }
 
diff --git a/rtic-monotonics/src/lib.rs b/rtic-monotonics/src/lib.rs
index 925a2b06b2..84f6aa4e3a 100644
--- a/rtic-monotonics/src/lib.rs
+++ b/rtic-monotonics/src/lib.rs
@@ -99,6 +99,7 @@ pub(crate) const fn cortex_logical2hw(logical: u8, nvic_prio_bits: u8) -> u8 {
     feature = "nrf5340-net",
     feature = "nrf9160",
     feature = "imxrt",
+    feature = "atsamd21g",
     stm32,
 ))]
 pub(crate) unsafe fn set_monotonic_prio(