diff --git a/rtic-monotonics/Cargo.toml b/rtic-monotonics/Cargo.toml index 24b739cdff..79017ec0ab 100644 --- a/rtic-monotonics/Cargo.toml +++ b/rtic-monotonics/Cargo.toml @@ -67,7 +67,7 @@ stm32-metapac = { version = "15.0.0", optional = true } imxrt-ral = { version = "0.5.3", optional = true } -esp32c3 = {version = "0.25.0", optional = true } +esp32c3 = {version = "0.26.0", optional = true } riscv = {version = "0.12.1", optional = true } diff --git a/rtic/Cargo.toml b/rtic/Cargo.toml index 0cc6a076e1..5c9fae77d2 100644 --- a/rtic/Cargo.toml +++ b/rtic/Cargo.toml @@ -26,7 +26,7 @@ name = "rtic" [dependencies] riscv-slic = { version = "0.1.1", optional = true } -esp32c3 = { version = "0.25.0", optional = true } +esp32c3 = { version = "0.26.0", optional = true } riscv = { version = "0.12.1", optional = true } cortex-m = { version = "0.7.0", optional = true } bare-metal = "1.0.0" diff --git a/rtic/src/export/riscv_esp32c3.rs b/rtic/src/export/riscv_esp32c3.rs index 1b0a91dbf3..f1b6b63223 100644 --- a/rtic/src/export/riscv_esp32c3.rs +++ b/rtic/src/export/riscv_esp32c3.rs @@ -71,13 +71,13 @@ pub unsafe fn lock(ptr: *mut T, ceiling: u8, f: impl FnOnce(&mut T) -> R) unsafe { (*INTERRUPT_CORE0::ptr()) .cpu_int_thresh() - .write(|w| w.cpu_int_thresh().bits(ceiling + 1)) + .write(|w| w.cpu_int_thresh().bits(ceiling + 1)); } //esp32c3 lets interrupts with prio equal to threshold through so we up it by one let r = f(&mut *ptr); unsafe { (*INTERRUPT_CORE0::ptr()) .cpu_int_thresh() - .write(|w| w.cpu_int_thresh().bits(current)) + .write(|w| w.cpu_int_thresh().bits(current)); } r } @@ -106,7 +106,7 @@ pub fn pend(int: Interrupt) { .cpu_intr_from_cpu_3() .write(|w| w.cpu_intr_from_cpu_3().bit(true)), _ => panic!("Unsupported software interrupt"), //should never happen, checked at compile time - } + }; } } @@ -132,7 +132,7 @@ pub fn unpend(int: Interrupt) { .cpu_intr_from_cpu_3() .write(|w| w.cpu_intr_from_cpu_3().bit(false)), _ => panic!("Unsupported software interrupt"), - } + }; } }