Commit graph

158 commits

Author SHA1 Message Date
Per Lindgren
527bfb6eec added compiler_fence(Ordering::SeqCst) around critical sections 2020-06-13 21:07:55 +02:00
Henrik Tjäder
602a5b4374 Rename RTFM to RTIC 2020-06-11 17:18:29 +00:00
Emil Fresk
eb6406da7e Fmt 2020-06-11 19:00:52 +02:00
Jorge Aparicio
303e964a10 touch src/lib.rs 2020-05-26 22:16:31 +02:00
bors[bot]
03ac76a0a2
Merge #295
295: docs: do not use Instant::now in #[init] r=korken89 a=japaric



Co-authored-by: Jorge Aparicio <jorge@japaric.io>
2020-01-24 15:14:58 +00:00
Jorge Aparicio
b04103f6df docs: do not use Instant::now in #[init] 2020-01-21 22:23:20 +01:00
bors[bot]
82efffd706
Merge #277
277: TimerQueue.dequeue: don't set SYST reload to 0 r=korken89 a=mpasternacki

ARM Architecture Reference Manual says: "Setting SYST_RVR to zero has the effect of disabling the SysTick counter independently of the counter enable bit."

If Monotonic's ratio is less than one, the timeout calculations
can compute zero if next task is scheduled after current instant, but
before next timer tick. This results in disabling SYST and freezing the
timer queue.

The division by ratio's denominator rounds downward and the dequeue
condition is `if instant < now`. If ratio is small enough, this results
in unnecessary interrupts:

Let's say `instant - now` is 99 and ratio is 1/25. Then, `dur` will
equal 3 and the next tick will happen at `now + 75`. In the next
interrupt, `instant > now` and additional tick needs to be scheduled
(which doesn't happen, because now `instant - now` is less than 25, so
reload will be set to 0 and timer queue will stop). Adding one to
computed duration will prevent both freezing and additional interrupts.

When ratio is 1 or close, timer queue code overhead will prevent this
from happening. I am working with a chip where CPU is clocked at 600MHz
and SysTick is 100kHz and the freeze happens quite often.

Co-authored-by: Maciej Pasternacki <maciej@3ofcoins.net>
2019-11-19 14:00:22 +00:00
Maciej Pasternacki
fef738e832 TimerQueue.dequeue: don't set SYST reload to 0
ARM Architecture Reference Manual says: "Setting SYST_RVR to zero has the effect of disabling the SysTick counter independently of the counter enable bit."

If Monotonic's ratio is less than one, the timeout calculations
can compute zero if next task is scheduled after current instant, but
before next timer tick. This results in disabling SYST and freezing the
timer queue.
2019-11-19 00:07:14 +01:00
Per Lindgren
dfab15ed78 Fixed internal overflow on subtraiton in elapsed and duration 2019-11-18 16:36:17 +01:00
Emil Fresk
2441b7e389 Minor docs update to monotonic 2019-11-13 21:19:59 +01:00
Jorge Aparicio
a458a07031 cyccnt::Instant: simplify the Send / Sync impl
originally the type was made `!Send` because it loses its meaning when
send from one core to another but that was an incorrect use of the `Send`
bound (the send operation makes the value incorrect but that doesn't cause
memory unsafety on its own). So later the type was (explicitly) made `Send`
again resulting in a convoluted implementation -- this commit simplifies things.
2019-10-15 19:31:46 -05:00
Jorge Aparicio
6207008884 document the limitations of cyccnt::{Instant,Duration} 2019-10-15 19:11:35 -05:00
Jorge Aparicio
eef4e7bf79 more monotonic timer docs
covers

- initialization and configuration of the timer; this is now a responsibility of
  the application author
- correctness of `Monotonic::now()` in `#[init]`
- safety of `Monotonic::reset()`

closes #251
2019-10-15 18:44:49 -05:00
Emil Fresk
686cc9b995 One more place updated 2019-09-15 22:00:52 +02:00
Jorge Aparicio
7aa270cb92 don't use deprecated API 2019-09-15 18:36:00 +02:00
Jorge Aparicio
996bdf8f0c doc tweaks 2019-08-21 12:33:04 +02:00
Jorge Aparicio
45f9faae9c document #[app] 2019-08-21 12:19:38 +02:00
Jorge Aparicio
a87cb2486f change Monotonic::ratio return type to Fraction 2019-07-11 13:28:25 +02:00
Jorge Aparicio
596cf585ea Monotonic trait is safe; add MultiCore trait 2019-06-24 14:09:12 +02:00
Jorge Aparicio
9897728709 add homogeneous multi-core support 2019-06-18 10:31:31 +02:00
Jorge Aparicio
81275bfa4f rtfm-syntax refactor + heterogeneous multi-core support 2019-06-13 23:56:59 +02:00
Jorge Aparicio
30d6327001 bump heapless dependency to v0.5.0; remove "nightly" feature
with the upcoming version of heapless we are able to initialize all internal
queues in const context removing the need for late initialization

this commit also removes the "nightly" feature because all the optimization
provided by it are now enabled by default
2019-05-21 15:22:25 +02:00
Jorge Aparicio
fafc94ccfb removes the maybe_uninit feature gate
and stop newtyping `core::mem::MaybeUninit`
2019-05-21 14:18:43 +02:00
Jorge Aparicio
a452700628 implement RFCs 147 and 155, etc.
This commit:

- Implements RFC 147: "all functions must be safe"

- Implements RFC 155: "explicit Context parameter"

- Implements the pending breaking change #141: reject assign syntax in `init`
  (which was used to initialize late resources)

- Refactors code generation to make it more readable -- there are no more random
  identifiers in the output -- and align it with the book description of RTFM
  internals.

- Makes the framework hard depend on `core::mem::MaybeUninit` and thus will
  require nightly until that API is stabilized.

- Fixes a ceiling analysis bug where the priority of the system timer was not
  considered in the analysis.

- Shrinks the size of all the internal queues by turning `AtomicUsize` indices
  into `AtomicU8`s.

- Removes the integration with `owned_singleton`.
2019-05-01 20:49:25 +02:00
Jorge Aparicio
53f0ca1504 more nightly fixes 2019-04-16 23:41:00 +02:00
Jorge Aparicio
10d2638488 [NFC] fix nightly ci 2019-04-16 23:17:28 +02:00
bors[bot]
6b61cd2e3f Merge #153
153: add "nightly" feature; replace hint::unreachable_unchecked with a panic r=korken89 a=japaric

this implements the action plan described in #149

to give you a sense of the overhead of this change: it has increased the binary
size of some of our examples by up to 10% but this is mainly from pulling in a
panic handler that does formatting

r? @korken89

Co-authored-by: Jorge Aparicio <jorge@japaric.io>
2019-02-23 19:37:29 +00:00
Jorge Aparicio
3973b420ec add Duration.as_cycles 2019-02-19 17:14:34 +01:00
Jorge Aparicio
28ee83dfdd turn all potential UB into panics 2019-02-19 13:13:16 +01:00
Jorge Aparicio
16821c8315 document the nightly feature 2019-02-19 13:13:16 +01:00
Jorge Aparicio
88078e7770 add "nightly" feature 2019-02-19 12:37:25 +01:00
Jorge Aparicio
7ce052be37 cargo fmt 2019-02-16 00:26:07 +01:00
Jorge Aparicio
2b8e743f35 make debug builds reproducible 2019-02-16 00:25:48 +01:00
Jorge Aparicio
1ba03b9f00 document MSRV and SemVer policy 2019-02-12 11:08:39 +01:00
Jorge Aparicio
0007a35a27 change layout of books 2019-02-11 21:40:53 +01:00
Jorge Aparicio
e7586f4a8a impl Default for Duration 2019-02-08 11:54:41 +01:00
Eddy Petrișor
8ac179d8ee Absolute link to the book so it works on crates.io
Signed-off-by: Eddy Petrișor <eddy.petrisor@gmail.com>
2019-01-09 01:56:21 +02:00
Jorge Aparicio
7de9687dfa note that entering / leaving a critical section is always constant time 2018-12-17 01:43:12 +01:00
Jorge Aparicio
06c1e2f9b4 note that the timer queue is not supported on ARMv6-M 2018-12-16 19:38:22 +01:00
Jorge Aparicio
d35f5bc0b0 use edition idioms in the top crate 2018-12-16 19:16:19 +01:00
Jorge Aparicio
4345c10596 properly handle #[cfg] (conditional compilation) on resources 2018-12-16 18:37:36 +01:00
Jorge Aparicio
9757c33b00 use the single core variant of spsc::Queue 2018-12-16 01:11:54 +01:00
Jorge Aparicio
37a0692a0f impl Mutex on all shared resources
document how to write generic code that operates on resources
2018-11-04 18:50:42 +01:00
Jorge Aparicio
c27efea6b7 fix some links 2018-11-03 19:29:44 +01:00
Jorge Aparicio
c631049efc v0.4.0
closes #32
closes #33
2018-11-03 17:16:55 +01:00
Jorge Aparicio
abca829926 more fixes 2018-08-24 16:31:04 +02:00
Jorge Aparicio
d8eb3eac75 fix documentation link 2018-01-15 23:58:04 +01:00
Jorge Aparicio
def4fc8079 v0.3.0 2018-01-15 23:33:09 +01:00
Jorge Aparicio
1be43fc489 adapt to changes in the cortex-m crate 2018-01-11 20:56:45 +01:00
Jorge Aparicio
c94bd2d98d add a Cargo feature, cm7-r0p1, to fix a Cortex-M7 BASEPRI erratum 2017-12-23 21:49:15 +01:00