searchState.loadedDescShard("nrf52840_pac", 0, "Peripheral access API for NRF52840 microcontrollers …\nAccelerated Address Resolver\nAAR\nAccess control lists\nACL\nCache and branch predictor maintenance operations\nCache and branch predictor maintenance operations. Not …\nAES CCM Mode Encryption\nCCM\n15 - CCM_AAR\nCRYPTOCELL HOST_RGF interface\nCC_HOST_RGF\nClock control\nCLOCK\nComparator\nCOMP\n19 - COMP_LPCOMP\nCPUID\nCPUID\nARM TrustZone CryptoCell register interface\nCRYPTOCELL\n42 - CRYPTOCELL\nCore peripherals\nDebug Control Block\nDebug Control Block\nData Watchpoint and Trace unit\nData Watchpoint and Trace unit\nAES ECB Mode Encryption\nECB\n14 - ECB\nEvent Generator Unit 0\nEGU0\nEvent Generator Unit 1\nEGU1\nEvent Generator Unit 2\nEGU2\nEvent Generator Unit 3\nEGU3\nEvent Generator Unit 4\nEGU4\nEvent Generator Unit 5\nEGU5\nFactory information configuration registers\nFICR\nFlash Patch and Breakpoint unit\nFlash Patch and Breakpoint unit. Not available on Armv6-M.\nFloating Point Unit\nFloating Point Unit.\n38 - FPU\nGPIO Tasks and Events\nGPIOTE\n6 - GPIOTE\nInter-IC Sound\nI2S\n37 - I2S\nImplementation Control Block.\nInstrumentation Trace Macrocell\nInstrumentation Trace Macrocell. Not available on Armv6-M …\nEnumeration of all the interrupts.\nLow Power Comparator\nLPCOMP\nMemory Protection Unit\nMemory Protection Unit\nMemory Watch Unit\nMWU\n32 - MWU\nNFC-A compatible radio\nNFCT\n5 - NFCT\nNested Vector Interrupt Controller\nNested Vector Interrupt Controller\nNumber available in the NVIC for configuring priority\nNon Volatile Memory Controller\nNVMC\nGPIO Port 1\nP0\nGPIO Port 2\nP1\nPulse Density Modulation (Digital Microphone) Interface\nPDM\n29 - PDM\nPower control\nPOWER\n0 - POWER_CLOCK\nProgrammable Peripheral Interconnect\nPPI\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPointer to the register block\nPulse width modulation unit 0\nPWM0\n28 - PWM0\nPulse width modulation unit 1\nPWM1\n33 - PWM1\nPulse width modulation unit 2\nPWM2\n34 - PWM2\nPulse width modulation unit 3\nPWM3\n45 - PWM3\nAll the peripherals\nQuadrature Decoder\nQDEC\n18 - QDEC\nExternal flash interface\nQSPI\n41 - QSPI\n2.4 GHz radio\nRADIO\n1 - RADIO\nRandom Number Generator\nRNG\n13 - RNG\nReal time counter 0\nRTC0\n11 - RTC0\nReal time counter 1\nRTC1\n17 - RTC1\nReal time counter 2\nRTC2\n36 - RTC2\nSuccessive approximation register (SAR) analog-to-digital …\nSAADC\n7 - SAADC\nSecurity Attribution Unit\nSystem Control Block\nSystem Control Block\nSerial Peripheral Interface 0\nSPI0\nSerial Peripheral Interface 1\nSPI1\nSerial Peripheral Interface 2\nSPI2\nSerial Peripheral Interface Master with EasyDMA 0\nSPIM0\n3 - SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0\nSerial Peripheral Interface Master with EasyDMA 1\nSPIM1\n4 - SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1\nSerial Peripheral Interface Master with EasyDMA 2\nSPIM2\n35 - SPIM2_SPIS2_SPI2\nSerial Peripheral Interface Master with EasyDMA 3\nSPIM3\n47 - SPIM3\nSPI Slave 0\nSPIS0\nSPI Slave 1\nSPIS1\nSPI Slave 2\nSPIS2\nSoftware interrupt 0\nSWI0\n20 - SWI0_EGU0\nSoftware interrupt 1\nSWI1\n21 - SWI1_EGU1\nSoftware interrupt 2\nSWI2\n22 - SWI2_EGU2\nSoftware interrupt 3\nSWI3\n23 - SWI3_EGU3\nSoftware interrupt 4\nSWI4\n24 - SWI4_EGU4\nSoftware interrupt 5\nSWI5\n25 - SWI5_EGU5\nSysTick: System Timer\nSysTick: System Timer\nTemperature Sensor\nTEMP\n12 - TEMP\nTimer/Counter 0\nTIMER0\n8 - TIMER0\nTimer/Counter 1\nTIMER1\n9 - TIMER1\nTimer/Counter 2\nTIMER2\n10 - TIMER2\nTimer/Counter 3\nTIMER3\n26 - TIMER3\nTimer/Counter 4\nTIMER4\n27 - TIMER4\nTrace Port Interface Unit\nTrace Port Interface Unit. Not available on Armv6-M.\nI2C compatible Two-Wire Interface 0\nTWI0\nI2C compatible Two-Wire Interface 1\nTWI1\nI2C compatible Two-Wire Master Interface with EasyDMA 0\nTWIM0\nI2C compatible Two-Wire Master Interface with EasyDMA 1\nTWIM1\nI2C compatible Two-Wire Slave Interface with EasyDMA 0\nTWIS0\nI2C compatible Two-Wire Slave Interface with EasyDMA 1\nTWIS1\nUniversal Asynchronous Receiver/Transmitter\nUART0\nUART with EasyDMA 0\nUARTE0\n2 - UARTE0_UART0\nUART with EasyDMA 1\nUARTE1\n40 - UARTE1\nUser information configuration registers\nUICR\nUniversal serial bus device\nUSBD\n39 - USBD\nWatchdog Timer\nWDT\n16 - WDT\nAccelerated Address Resolver\nAccess control lists\nBranch predictor invalidate all\nReturns log2 of the number of words in the smallest cache …\nReturns log2 of the number of words in the smallest cache …\nReturns the number of sets and ways in the selected cache\nCRYPTOCELL HOST_RGF interface\nAES CCM Mode Encryption\nCleans the entire D-cache.\nCleans D-cache by address.\nCleans an object from the D-cache.\nCleans a slice from D-cache.\nCleans and invalidates the entire D-cache.\nCleans and invalidates D-cache by address.\nClears current value to 0\nSet the PENDSTCLR bit in the ICSR register which will …\nSet the PENDSVCLR bit in the ICSR register which will …\nClear the SLEEPDEEP bit in the SCR register\nClear the SLEEPONEXIT bit in the SCR register\nClock control\nComparator\nGet the CPI count\nARM TrustZone CryptoCell register interface\nReturns the current clock cycle count\nReturns true
if the cycle counter is enabled\nReturns whether the D-cache is currently enabled.\nD-cache clean and invalidate by MVA to PoC\nD-cache clean and invalidate by set-way\nD-cache clean by MVA to PoC\nD-cache clean by MVA to PoU\nD-cache clean by set-way\nD-cache invalidate by MVA to PoC\nD-cache invalidate by set-way\nDisable the exception\nDisables counter\nDisables the cycle counter\nDisables D-cache if currently enabled.\nDisables I-cache if currently enabled.\nDisables SysTick interrupt\nDisables TRACE. See DCB::enable_trace()
for more details\nAES ECB Mode Encryption\nEvent Generator Unit 0\nEvent Generator Unit 1\nEvent Generator Unit 2\nEvent Generator Unit 3\nEvent Generator Unit 4\nEvent Generator Unit 5\nEnable the exception\nEnables counter\nEnables the cycle counter\nEnables D-cache if currently disabled.\nEnables I-cache if currently disabled.\nEnables SysTick interrupt\nEnables TRACE. This is for example required by the …\nGet the total cycles spent in exception processing\nFactory information configuration registers\nGet the folded instruction count\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCommon register and bit access and modify traits\nGets clock source\nGets current value\nReturns the current clock cycle count\nReturns the NVIC priority of interrupt
\nReturns the hardware priority of system_handler
\nGets reload value\nReturns the reload value with which the counter would wrap …\nGPIO Tasks and Events\nReturns true
if the implementation supports a cycle counter\nReturns true
if the the implementation supports sampling …\nReturns true
if the implementation includes external match …\nReturns true
if the implementation the profiling counters\nChecks if an external reference clock is available\nChecks if the counter wrapped (underflowed) since the last …\nInter-IC Sound\nReturns whether the I-cache is currently enabled.\nI-cache invalidate all to PoU\nI-cache invalidate by MVA to PoU\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
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.\nCalls U::from(self)
.\nCalls U::from(self)
.\nInvalidates D-cache by address.\nInvalidates an object from the D-cache.\nInvalidates a slice from the D-cache.\nInvalidates the entire I-cache.\nIs interrupt
active or pre-empted and stacked\nChecks if counter is enabled\nIs there a debugger attached? (see note)\nChecks if interrupt
is enabled\nCheck if an exception is enabled\nChecks if SysTick interrupt is enabled\nChecks if interrupt
is pending\nCheck if PENDSTSET bit in the ICSR register is set meaning …\nCheck if PENDSVSET bit in the ICSR register is set meaning …\nChecks if the calibration value is precise\nLow Power Comparator\nGet the additional cycles required to execute all load or …\nDisables interrupt
\nMemory Watch Unit\nNFC-A compatible radio\nNumber of comparators implemented\nNon Volatile Memory Controller\nGPIO Port 1\nGPIO Port 2\nPulse Density Modulation (Digital Microphone) Interface\nForces interrupt
into pending state\nPower control\nProgrammable Peripheral Interconnect\nReturn the pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturns a pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nReturn the pointer to the register block\nPulse width modulation unit 0\nPulse width modulation unit 1\nPulse width modulation unit 2\nPulse width modulation unit 3\nQuadrature Decoder\nExternal flash interface\n2.4 GHz radio\nRequest an IRQ in software\nRandom Number Generator\nReal time counter 0\nReal time counter 1\nReal time counter 2\nSuccessive approximation register (SAR) analog-to-digital …\nSelects the current CCSIDR\nSets clock source\nSet the CPI count\nSet the cycle count\nSet the exception count\nSet the folded instruction count\nSet the lsu count\nSet the PENDSTSET bit in the ICSR register which will pend …\nSet the PENDSVSET bit in the ICSR register which will pend …\nSets the “priority” of interrupt
to prio
\nSets the hardware priority of system_handler
to prio
\nSets reload value\nSet the sleep count\nSet the SLEEPDEEP bit in the SCR register\nSet the SLEEPONEXIT bit in the SCR register\nGet the total number of cycles that the processor is …\nSerial Peripheral Interface 0\nSerial Peripheral Interface 1\nSerial Peripheral Interface 2\nSerial Peripheral Interface Master with EasyDMA 0\nSerial Peripheral Interface Master with EasyDMA 1\nSerial Peripheral Interface Master with EasyDMA 2\nSerial Peripheral Interface Master with EasyDMA 3\nSPI Slave 0\nSPI Slave 1\nSPI Slave 2\nUnchecked version of Peripherals::take
\nUnchecked version of Peripherals::take
\nSoftware interrupt 0\nSoftware interrupt 1\nSoftware interrupt 2\nSoftware interrupt 3\nSoftware interrupt 4\nSoftware interrupt 5\nInitiate a system reset request to reset the MCU\nReturns all the core peripherals once\nReturns all the peripherals once\nTemperature Sensor\nTimer/Counter 0\nTimer/Counter 1\nTimer/Counter 2\nTimer/Counter 3\nTimer/Counter 4\nI2C compatible Two-Wire Interface 0\nI2C compatible Two-Wire Interface 1\nI2C compatible Two-Wire Master Interface with EasyDMA 0\nI2C compatible Two-Wire Master Interface with EasyDMA 1\nI2C compatible Two-Wire Slave Interface with EasyDMA 0\nI2C compatible Two-Wire Slave Interface with EasyDMA 1\nUniversal Asynchronous Receiver/Transmitter\nUART with EasyDMA 0\nUART with EasyDMA 1\nUser information configuration registers\nRemoves the software lock on the DWT\nEnables interrupt
\nClears interrupt
’s pending state\nUniversal serial bus device\nReturns the active exception number\nWatchdog Timer\nADDRPTR (rw) register accessor: an alias for …\nENABLE (rw) register accessor: an alias for …\nEVENTS_END (rw) register accessor: an alias for …\nEVENTS_NOTRESOLVED (rw) register accessor: an alias for …\nEVENTS_RESOLVED (rw) register accessor: an alias for …\nINTENCLR (rw) register accessor: an alias for …\nINTENSET (rw) register accessor: an alias for …\nIRKPTR (rw) register accessor: an alias for …\nNIRK (rw) register accessor: an alias for Reg<NIRK_SPEC>
\nRegister block\nSCRATCHPTR (rw) register accessor: an alias for …\nSTATUS (r) register accessor: an alias for Reg<STATUS_SPEC>
\nTASKS_START (w) register accessor: an alias for …\nTASKS_STOP (w) register accessor: an alias for …\nPointer to the resolvable address\n0x510 - Pointer to the resolvable address\nEnable AAR\n0x500 - Enable AAR\nAddress resolution procedure complete\n0x100 - Address resolution procedure complete\nAddress not resolved\n0x108 - Address not resolved\nAddress resolved\n0x104 - Address resolved\nReturns the argument unchanged.\nDisable interrupt\n0x308 - Disable interrupt\nEnable interrupt\n0x304 - Enable interrupt\nCalls U::from(self)
.\nPointer to IRK data structure\n0x508 - Pointer to IRK data structure\nNumber of IRKs\n0x504 - Number of IRKs\nPointer to data area used for temporary storage\n0x514 - Pointer to data area used for temporary storage\nResolution status\n0x400 - Resolution status\nStart resolving addresses based on IRKs specified in the …\n0x00 - Start resolving addresses based on IRKs specified …\nStop resolving addresses\n0x08 - Stop resolving addresses\nField ADDRPTR
reader - Pointer to the resolvable address …\nPointer to the resolvable address\nField ADDRPTR
writer - Pointer to the resolvable address …\nRegister ADDRPTR
reader\nRegister ADDRPTR
writer\nBits 0:31 - Pointer to the resolvable address (6-bytes)\nBits 0:31 - Pointer to the resolvable address (6-bytes)\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\n0: Disable\n3: Enable\nEnable or disable AAR\nField ENABLE
reader - Enable or disable AAR\nEnable AAR\nField ENABLE
writer - Enable or disable AAR\nRegister ENABLE
reader\nRegister ENABLE
writer\nWrites raw bits to the register.\nDisable\nBits 0:1 - Enable or disable AAR\nBits 0:1 - Enable or disable AAR\nEnable\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nGet enumerated values variant\nField EVENTS_END
reader -\nAddress resolution procedure complete\nField EVENTS_END
writer -\nRegister EVENTS_END
reader\nRegister EVENTS_END
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_NOTRESOLVED
reader -\nAddress not resolved\nField EVENTS_NOTRESOLVED
writer -\nRegister EVENTS_NOTRESOLVED
reader\nRegister EVENTS_NOTRESOLVED
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_RESOLVED
reader -\nAddress resolved\nField EVENTS_RESOLVED
writer -\nRegister EVENTS_RESOLVED
reader\nRegister EVENTS_RESOLVED
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\n1: Disable\n1: Disable\n1: Disable\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\nWrite ‘1’ to disable interrupt for END event\nWrite ‘1’ to disable interrupt for END event\nField END
reader - Write ‘1’ to disable interrupt for …\nField END
writer - Write ‘1’ to disable interrupt for …\nDisable interrupt\nWrite ‘1’ to disable interrupt for NOTRESOLVED event\nWrite ‘1’ to disable interrupt for NOTRESOLVED event\nField NOTRESOLVED
reader - Write ‘1’ to disable …\nField NOTRESOLVED
writer - Write ‘1’ to disable …\nRegister INTENCLR
reader\nWrite ‘1’ to disable interrupt for RESOLVED event\nWrite ‘1’ to disable interrupt for RESOLVED event\nField RESOLVED
reader - Write ‘1’ to disable interrupt …\nField RESOLVED
writer - Write ‘1’ to disable interrupt …\nRegister INTENCLR
writer\nWrites raw bits to the register.\nDisable\nDisable\nDisable\nBit 0 - Write ‘1’ to disable interrupt for END event\nBit 0 - Write ‘1’ to disable interrupt for END event\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nBit 2 - Write ‘1’ to disable interrupt for NOTRESOLVED …\nBit 2 - Write ‘1’ to disable interrupt for NOTRESOLVED …\nBit 1 - Write ‘1’ to disable interrupt for RESOLVED …\nBit 1 - Write ‘1’ to disable interrupt for RESOLVED …\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\nWrite ‘1’ to enable interrupt for END event\nWrite ‘1’ to enable interrupt for END event\nField END
reader - Write ‘1’ to enable interrupt for …\nField END
writer - Write ‘1’ to enable interrupt for …\nEnable interrupt\nWrite ‘1’ to enable interrupt for NOTRESOLVED event\nWrite ‘1’ to enable interrupt for NOTRESOLVED event\nField NOTRESOLVED
reader - Write ‘1’ to enable …\nField NOTRESOLVED
writer - Write ‘1’ to enable …\nRegister INTENSET
reader\nWrite ‘1’ to enable interrupt for RESOLVED event\nWrite ‘1’ to enable interrupt for RESOLVED event\nField RESOLVED
reader - Write ‘1’ to enable interrupt …\nField RESOLVED
writer - Write ‘1’ to enable interrupt …\n1: Enable\n1: Enable\n1: Enable\nRegister INTENSET
writer\nWrites raw bits to the register.\nBit 0 - Write ‘1’ to enable interrupt for END event\nBit 0 - Write ‘1’ to enable interrupt for END event\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nBit 2 - Write ‘1’ to enable interrupt for NOTRESOLVED …\nBit 2 - Write ‘1’ to enable interrupt for NOTRESOLVED …\nBit 1 - Write ‘1’ to enable interrupt for RESOLVED …\nBit 1 - Write ‘1’ to enable interrupt for RESOLVED …\nEnable\nEnable\nEnable\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nField IRKPTR
reader - Pointer to the IRK data structure\nPointer to IRK data structure\nField IRKPTR
writer - Pointer to the IRK data structure\nRegister IRKPTR
reader\nRegister IRKPTR
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBits 0:31 - Pointer to the IRK data structure\nBits 0:31 - Pointer to the IRK data structure\nField NIRK
reader - Number of Identity root keys available …\nNumber of IRKs\nField NIRK
writer - Number of Identity root keys available …\nRegister NIRK
reader\nRegister NIRK
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBits 0:4 - Number of Identity root keys available in the …\nBits 0:4 - Number of Identity root keys available in the …\nRegister SCRATCHPTR
reader\nField SCRATCHPTR
reader - Pointer to a scratch data area …\nPointer to data area used for temporary storage\nField SCRATCHPTR
writer - Pointer to a scratch data area …\nRegister SCRATCHPTR
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBits 0:31 - Pointer to a scratch data area used for …\nBits 0:31 - Pointer to a scratch data area used for …\nRegister STATUS
reader\nField STATUS
reader - The IRK that was used last time an …\nResolution status\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBits 0:3 - The IRK that was used last time an address was …\nStart resolving addresses based on IRKs specified in the …\nField TASKS_START
writer -\nRegister TASKS_START
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStop resolving addresses\nField TASKS_STOP
writer -\nRegister TASKS_STOP
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nUnspecified\nRegister block\nCluster Unspecified\n0x800..0x880 - Unspecified\nReturns the argument unchanged.\nCalls U::from(self)
.\nRegister block\nADDR (rw) register accessor: an alias for Reg<ADDR_SPEC>
\nPERM (rw) register accessor: an alias for Reg<PERM_SPEC>
\nSIZE (rw) register accessor: an alias for Reg<SIZE_SPEC>
\nUNUSED0 (rw) register accessor: an alias for …\nDescription cluster[n]: Configure the word-aligned start …\n0x00 - Description cluster[n]: Configure the word-aligned …\nReturns the argument unchanged.\nCalls U::from(self)
.\nDescription cluster[n]: Access permissions for region n as …\n0x08 - Description cluster[n]: Access permissions for …\nDescription cluster[n]: Size of region to protect counting …\n0x04 - Description cluster[n]: Size of region to protect …\nUnspecified\n0x0c - Unspecified\nField ADDR
reader - Valid word-aligned start address of …\nDescription cluster[n]: Configure the word-aligned start …\nField ADDR
writer - Valid word-aligned start address of …\nRegister ADDR
reader\nRegister ADDR
writer\nBits 0:31 - Valid word-aligned start address of region n …\nBits 0:31 - Valid word-aligned start address of region n …\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\n1: Block write and erase instructions to region n\n1: Block read instructions to region n\n0: Allow write and erase instructions to region n\n0: Allow read instructions to region n\nDescription cluster[n]: Access permissions for region n as …\nRegister PERM
reader\nConfigure read permissions for region n. Write ‘0’ has …\nField READ
reader - Configure read permissions for region …\nField READ
writer - Configure read permissions for region …\nRegister PERM
writer\nConfigure write and erase permissions for region n. Write …\nField WRITE
reader - Configure write and erase permissions …\nField WRITE
writer - Configure write and erase permissions …\nWrites raw bits to the register.\nBlock write and erase instructions to region n\nBlock read instructions to region n\nAllow write and erase instructions to region n\nAllow read instructions to region n\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLE
\nChecks if the value of the field is DISABLE
\nChecks if the value of the field is ENABLE
\nChecks if the value of the field is ENABLE
\nBit 2 - Configure read permissions for region n. Write ‘0…\nBit 2 - Configure read permissions for region n. Write ‘0…\nGet enumerated values variant\nGet enumerated values variant\nBit 1 - Configure write and erase permissions for region …\nBit 1 - Configure write and erase permissions for region …\nRegister SIZE
reader\nField SIZE
reader - Size of flash region n in bytes. Must …\nDescription cluster[n]: Size of region to protect counting …\nField SIZE
writer - Size of flash region n in bytes. Must …\nRegister SIZE
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBits 0:31 - Size of flash region n in bytes. Must be a …\nBits 0:31 - Size of flash region n in bytes. Must be a …\nRegister UNUSED0
reader\nUnspecified\nRegister UNUSED0
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nHOST_CRYPTOKEY_SEL (rw) register accessor: an alias for …\nHOST_IOT_KDR0 (rw) register accessor: an alias for …\nHOST_IOT_KDR1 (w) register accessor: an alias for …\nHOST_IOT_KDR2 (w) register accessor: an alias for …\nHOST_IOT_KDR3 (w) register accessor: an alias for …\nHOST_IOT_KPRTL_LOCK (rw) register accessor: an alias for …\nHOST_IOT_LCS (rw) register accessor: an alias for …\nRegister block\nReturns the argument unchanged.\nAES hardware key select\n0x1a38 - AES hardware key select\nThis register holds bits 31:0 of K_DR. The value of this …\n0x1a50 - This register holds bits 31:0 of K_DR. The value …\nThis register holds bits 63:32 of K_DR. The value of this …\n0x1a54 - This register holds bits 63:32 of K_DR. The value …\nThis register holds bits 95:64 of K_DR. The value of this …\n0x1a58 - This register holds bits 95:64 of K_DR. The value …\nThis register holds bits 127:96 of K_DR. The value of this …\n0x1a5c - This register holds bits 127:96 of K_DR. The …\nThis write-once register is the K_PRTL lock register. When …\n0x1a4c - This write-once register is the K_PRTL lock …\nControls lifecycle state (LCS) for CRYPTOCELL subsystem\n0x1a60 - Controls lifecycle state (LCS) for CRYPTOCELL …\nCalls U::from(self)
.\nSelect the source of the HW key that is used by the AES …\nField HOST_CRYPTOKEY_SEL
reader - Select the source of the …\nAES hardware key select\nField HOST_CRYPTOKEY_SEL
writer - Select the source of the …\n0: Use device root key K_DR from CRYPTOCELL AO power domain\n1: Use hard-coded RTL key K_PRTL\nRegister HOST_CRYPTOKEY_SEL
reader\n2: Use provided session key\nRegister HOST_CRYPTOKEY_SEL
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBits 0:1 - Select the source of the HW key that is used by …\nBits 0:1 - Select the source of the HW key that is used by …\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is K_DR
\nChecks if the value of the field is K_PRTL
\nChecks if the value of the field is SESSION
\nUse device root key K_DR from CRYPTOCELL AO power domain\nUse hard-coded RTL key K_PRTL\nUse provided session key\nGet enumerated values variant\nField HOST_IOT_KDR0
reader - Write: K_DR bits 31:0 Read: …\nThis register holds bits 31:0 of K_DR. The value of this …\nField HOST_IOT_KDR0
writer - Write: K_DR bits 31:0 Read: …\nRegister HOST_IOT_KDR0
reader\nRegister HOST_IOT_KDR0
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBits 0:31 - Write: K_DR bits 31:0 Read: 0x00000000 when …\nBits 0:31 - Write: K_DR bits 31:0 Read: 0x00000000 when …\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nThis register holds bits 63:32 of K_DR. The value of this …\nField HOST_IOT_KDR1
writer - K_DR bits 63:32\nRegister HOST_IOT_KDR1
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBits 0:31 - K_DR bits 63:32\nCalls U::from(self)
.\nCalls U::from(self)
.\nThis register holds bits 95:64 of K_DR. The value of this …\nField HOST_IOT_KDR2
writer - K_DR bits 95:64\nRegister HOST_IOT_KDR2
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBits 0:31 - K_DR bits 95:64\nCalls U::from(self)
.\nCalls U::from(self)
.\nThis register holds bits 127:96 of K_DR. The value of this …\nField HOST_IOT_KDR3
writer - K_DR bits 127:96\nRegister HOST_IOT_KDR3
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBits 0:31 - K_DR bits 127:96\nCalls U::from(self)
.\nCalls U::from(self)
.\n0: K_PRTL can be selected for use from register …\n1: K_PRTL has been locked until next power-on reset (POR). …\nThis register is the K_PRTL lock register. When this …\nField HOST_IOT_KPRTL_LOCK
reader - This register is the …\nThis write-once register is the K_PRTL lock register. When …\nField HOST_IOT_KPRTL_LOCK
writer - This register is the …\nRegister HOST_IOT_KPRTL_LOCK
reader\nRegister HOST_IOT_KPRTL_LOCK
writer\nWrites raw bits to the register.\nK_PRTL can be selected for use from register …\nK_PRTL has been locked until next power-on reset (POR). If …\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBit 0 - This register is the K_PRTL lock register. When …\nBit 0 - This register is the K_PRTL lock register. When …\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nGet enumerated values variant\n0: CC310 operates in debug mode\nControls lifecycle state (LCS) for CRYPTOCELL subsystem\n0: A valid LCS is not yet retained in the CRYPTOCELL AO …\nLifecycle state value. This field is write-once per reset.\nThis field is read-only and indicates if CRYPTOCELL LCS …\nField LCS_IS_VALID
reader - This field is read-only and …\nField LCS_IS_VALID
writer - This field is read-only and …\nField LCS
reader - Lifecycle state value. This field is …\nField LCS
writer - Lifecycle state value. This field is …\nRegister HOST_IOT_LCS
reader\n2: CC310 operates in secure mode\n1: A valid LCS is successfully retained in the CRYPTOCELL …\nRegister HOST_IOT_LCS
writer\nWrites raw bits to the register.\nCC310 operates in debug mode\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nA valid LCS is not yet retained in the CRYPTOCELL AO power …\nChecks if the value of the field is DEBUG
\nChecks if the value of the field is INVALID
\nChecks if the value of the field is SECURE
\nChecks if the value of the field is VALID
\nBits 0:2 - Lifecycle state value. This field is write-once …\nBits 0:2 - Lifecycle state value. This field is write-once …\nBit 8 - This field is read-only and indicates if …\nBit 8 - This field is read-only and indicates if …\nCC310 operates in secure mode\nA valid LCS is successfully retained in the CRYPTOCELL AO …\nGet enumerated values variant\nGet enumerated values variant\nCNFPTR (rw) register accessor: an alias for …\nENABLE (rw) register accessor: an alias for …\nEVENTS_ENDCRYPT (rw) register accessor: an alias for …\nEVENTS_ENDKSGEN (rw) register accessor: an alias for …\nEVENTS_ERROR (rw) register accessor: an alias for …\nINPTR (rw) register accessor: an alias for Reg<INPTR_SPEC>
\nINTENCLR (rw) register accessor: an alias for …\nINTENSET (rw) register accessor: an alias for …\nMAXPACKETSIZE (rw) register accessor: an alias for …\nMICSTATUS (r) register accessor: an alias for …\nMODE (rw) register accessor: an alias for Reg<MODE_SPEC>
\nOUTPTR (rw) register accessor: an alias for …\nRATEOVERRIDE (rw) register accessor: an alias for …\nRegister block\nSCRATCHPTR (rw) register accessor: an alias for …\nSHORTS (rw) register accessor: an alias for …\nTASKS_CRYPT (w) register accessor: an alias for …\nTASKS_KSGEN (w) register accessor: an alias for …\nTASKS_RATEOVERRIDE (w) register accessor: an alias for …\nTASKS_STOP (w) register accessor: an alias for …\nPointer to data structure holding AES key and NONCE vector\n0x508 - Pointer to data structure holding AES key and …\nEnable\n0x500 - Enable\nEncrypt/decrypt complete\n0x104 - Encrypt/decrypt complete\nKey-stream generation complete\n0x100 - Key-stream generation complete\nDeprecated register - CCM error event\n0x108 - Deprecated register - CCM error event\nReturns the argument unchanged.\nInput pointer\n0x50c - Input pointer\nDisable interrupt\n0x308 - Disable interrupt\nEnable interrupt\n0x304 - Enable interrupt\nCalls U::from(self)
.\nLength of key-stream generated when MODE.LENGTH = Extended.\n0x518 - Length of key-stream generated when MODE.LENGTH = …\nMIC check result\n0x400 - MIC check result\nOperation mode\n0x504 - Operation mode\nOutput pointer\n0x510 - Output pointer\nData rate override setting.\n0x51c - Data rate override setting.\nPointer to data area used for temporary storage\n0x514 - Pointer to data area used for temporary storage\nShortcut register\n0x200 - Shortcut register\nStart encryption/decryption. This operation will stop by …\n0x04 - Start encryption/decryption. This operation will …\nStart generation of key-stream. This operation will stop …\n0x00 - Start generation of key-stream. This operation will …\nOverride DATARATE setting in MODE register with the …\n0x0c - Override DATARATE setting in MODE register with the …\nStop encryption/decryption\n0x08 - Stop encryption/decryption\nField CNFPTR
reader - Pointer to the data structure …\nPointer to data structure holding AES key and NONCE vector\nField CNFPTR
writer - Pointer to the data structure …\nRegister CNFPTR
reader\nRegister CNFPTR
writer\nWrites raw bits to the register.\nBits 0:31 - Pointer to the data structure holding the AES …\nBits 0:31 - Pointer to the data structure holding the AES …\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\n0: Disable\n2: Enable\nEnable or disable CCM\nField ENABLE
reader - Enable or disable CCM\nEnable\nField ENABLE
writer - Enable or disable CCM\nRegister ENABLE
reader\nRegister ENABLE
writer\nWrites raw bits to the register.\nDisable\nBits 0:1 - Enable or disable CCM\nBits 0:1 - Enable or disable CCM\nEnable\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nGet enumerated values variant\nField EVENTS_ENDCRYPT
reader -\nEncrypt/decrypt complete\nField EVENTS_ENDCRYPT
writer -\nRegister EVENTS_ENDCRYPT
reader\nRegister EVENTS_ENDCRYPT
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_ENDKSGEN
reader -\nKey-stream generation complete\nField EVENTS_ENDKSGEN
writer -\nRegister EVENTS_ENDKSGEN
reader\nRegister EVENTS_ENDKSGEN
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_ERROR
reader -\nDeprecated register - CCM error event\nField EVENTS_ERROR
writer -\nRegister EVENTS_ERROR
reader\nRegister EVENTS_ERROR
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField INPTR
reader - Input pointer\nInput pointer\nField INPTR
writer - Input pointer\nRegister INPTR
reader\nRegister INPTR
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBits 0:31 - Input pointer\nBits 0:31 - Input pointer\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\n1: Disable\n1: Disable\n1: Disable\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\nWrite ‘1’ to disable interrupt for ENDCRYPT event\nWrite ‘1’ to disable interrupt for ENDCRYPT event\nField ENDCRYPT
reader - Write ‘1’ to disable interrupt …\nField ENDCRYPT
writer - Write ‘1’ to disable interrupt …\nWrite ‘1’ to disable interrupt for ENDKSGEN event\nWrite ‘1’ to disable interrupt for ENDKSGEN event\nField ENDKSGEN
reader - Write ‘1’ to disable interrupt …\nField ENDKSGEN
writer - Write ‘1’ to disable interrupt …\nWrite ‘1’ to disable interrupt for ERROR event\nWrite ‘1’ to disable interrupt for ERROR event\nField ERROR
reader - Write ‘1’ to disable interrupt …\nField ERROR
writer - Write ‘1’ to disable interrupt …\nDisable interrupt\nRegister INTENCLR
reader\nRegister INTENCLR
writer\nWrites raw bits to the register.\nDisable\nDisable\nDisable\nBit 1 - Write ‘1’ to disable interrupt for ENDCRYPT …\nBit 1 - Write ‘1’ to disable interrupt for ENDCRYPT …\nBit 0 - Write ‘1’ to disable interrupt for ENDKSGEN …\nBit 0 - Write ‘1’ to disable interrupt for ENDKSGEN …\nBit 2 - Write ‘1’ to disable interrupt for ERROR event\nBit 2 - Write ‘1’ to disable interrupt for ERROR event\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\nWrite ‘1’ to enable interrupt for ENDCRYPT event\nWrite ‘1’ to enable interrupt for ENDCRYPT event\nField ENDCRYPT
reader - Write ‘1’ to enable interrupt …\nField ENDCRYPT
writer - Write ‘1’ to enable interrupt …\nWrite ‘1’ to enable interrupt for ENDKSGEN event\nWrite ‘1’ to enable interrupt for ENDKSGEN event\nField ENDKSGEN
reader - Write ‘1’ to enable interrupt …\nField ENDKSGEN
writer - Write ‘1’ to enable interrupt …\nWrite ‘1’ to enable interrupt for ERROR event\nWrite ‘1’ to enable interrupt for ERROR event\nField ERROR
reader - Write ‘1’ to enable interrupt for …\nField ERROR
writer - Write ‘1’ to enable interrupt for …\nEnable interrupt\nRegister INTENSET
reader\n1: Enable\n1: Enable\n1: Enable\nRegister INTENSET
writer\nWrites raw bits to the register.\nBit 1 - Write ‘1’ to enable interrupt for ENDCRYPT …\nBit 1 - Write ‘1’ to enable interrupt for ENDCRYPT …\nBit 0 - Write ‘1’ to enable interrupt for ENDKSGEN …\nBit 0 - Write ‘1’ to enable interrupt for ENDKSGEN …\nBit 2 - Write ‘1’ to enable interrupt for ERROR event\nBit 2 - Write ‘1’ to enable interrupt for ERROR event\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nEnable\nEnable\nEnable\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nField MAXPACKETSIZE
reader - Length of key-stream …\nLength of key-stream generated when MODE.LENGTH = Extended.\nField MAXPACKETSIZE
writer - Length of key-stream …\nRegister MAXPACKETSIZE
reader\nRegister MAXPACKETSIZE
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBits 0:7 - Length of key-stream generated when MODE.LENGTH …\nBits 0:7 - Length of key-stream generated when MODE.LENGTH …\n0: MIC check failed\n1: MIC check passed\nThe result of the MIC check performed during the previous …\nField MICSTATUS
reader - The result of the MIC check …\nMIC check result\nRegister MICSTATUS
reader\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is CHECK_FAILED
\nChecks if the value of the field is CHECK_PASSED
\nBit 0 - The result of the MIC check performed during the …\nGet enumerated values variant\nRadio data rate that the CCM shall run synchronous with\nField DATARATE
reader - Radio data rate that the CCM shall …\nField DATARATE
writer - Radio data rate that the CCM shall …\n1: AES CCM packet decryption mode\n0: Default length. Effective length of LENGTH field in …\n0: AES CCM packet encryption mode\n1: Extended length. Effective length of LENGTH field in …\nPacket length configuration\nField LENGTH
reader - Packet length configuration\nField LENGTH
writer - Packet length configuration\nThe mode of operation to be used. The settings in this …\nField MODE
reader - The mode of operation to be used. The …\nOperation mode\nField MODE
writer - The mode of operation to be used. The …\nRegister MODE
reader\nRegister MODE
writer\n2: 125 Kbps\n125 Kbps\n0: 1 Mbps\n1 Mbps\n1: 2 Mbps\n2 Mbps\n3: 500 Kbps\n500 Kbps\nWrites raw bits to the register.\nBits 16:17 - Radio data rate that the CCM shall run …\nBits 16:17 - Radio data rate that the CCM shall run …\nAES CCM packet decryption mode\nDefault length. Effective length of LENGTH field in …\nAES CCM packet encryption mode\nExtended length. Effective length of LENGTH field in …\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is _125KBPS
\nChecks if the value of the field is _1MBIT
\nChecks if the value of the field is _2MBIT
\nChecks if the value of the field is _500KBPS
\nChecks if the value of the field is DECRYPTION
\nChecks if the value of the field is DEFAULT
\nChecks if the value of the field is ENCRYPTION
\nChecks if the value of the field is EXTENDED
\nBit 24 - Packet length configuration\nBit 24 - Packet length configuration\nBit 0 - The mode of operation to be used. The settings in …\nBit 0 - The mode of operation to be used. The settings in …\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nField OUTPTR
reader - Output pointer\nOutput pointer\nField OUTPTR
writer - Output pointer\nRegister OUTPTR
reader\nRegister OUTPTR
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBits 0:31 - Output pointer\nBits 0:31 - Output pointer\nRegister RATEOVERRIDE
reader\nData rate override setting.\nField RATEOVERRIDE
reader - Data rate override setting.\nData rate override setting.\nField RATEOVERRIDE
writer - Data rate override setting.\nRegister RATEOVERRIDE
writer\n2: 125 Kbps\n125 Kbps\n0: 1 Mbps\n1 Mbps\n1: 2 Mbps\n2 Mbps\n3: 500 Kbps\n500 Kbps\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is _125KBPS
\nChecks if the value of the field is _1MBIT
\nChecks if the value of the field is _2MBIT
\nChecks if the value of the field is _500KBPS
\nBits 0:1 - Data rate override setting.\nBits 0:1 - Data rate override setting.\nGet enumerated values variant\nRegister SCRATCHPTR
reader\nField SCRATCHPTR
reader - Pointer to a scratch data area …\nPointer to data area used for temporary storage\nField SCRATCHPTR
writer - Pointer to a scratch data area …\nRegister SCRATCHPTR
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBits 0:31 - Pointer to a scratch data area used for …\nBits 0:31 - Pointer to a scratch data area used for …\n0: Disable shortcut\n1: Enable shortcut\nShortcut between ENDKSGEN event and CRYPT task\nField ENDKSGEN_CRYPT
reader - Shortcut between ENDKSGEN …\nField ENDKSGEN_CRYPT
writer - Shortcut between ENDKSGEN …\nRegister SHORTS
reader\nShortcut register\nRegister SHORTS
writer\nWrites raw bits to the register.\nDisable shortcut\nEnable shortcut\nBit 0 - Shortcut between ENDKSGEN event and CRYPT task\nBit 0 - Shortcut between ENDKSGEN event and CRYPT task\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nGet enumerated values variant\nStart encryption/decryption. This operation will stop by …\nField TASKS_CRYPT
writer -\nRegister TASKS_CRYPT
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStart generation of key-stream. This operation will stop …\nField TASKS_KSGEN
writer -\nRegister TASKS_KSGEN
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nOverride DATARATE setting in MODE register with the …\nField TASKS_RATEOVERRIDE
writer -\nRegister TASKS_RATEOVERRIDE
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStop encryption/decryption\nField TASKS_STOP
writer -\nRegister TASKS_STOP
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nCTIV (rw) register accessor: an alias for Reg<CTIV_SPEC>
\nEVENTS_CTSTARTED (rw) register accessor: an alias for …\nEVENTS_CTSTOPPED (rw) register accessor: an alias for …\nEVENTS_CTTO (rw) register accessor: an alias for …\nEVENTS_DONE (rw) register accessor: an alias for …\nEVENTS_HFCLKSTARTED (rw) register accessor: an alias for …\nEVENTS_LFCLKSTARTED (rw) register accessor: an alias for …\nHFCLKRUN (r) register accessor: an alias for …\nHFCLKSTAT (r) register accessor: an alias for …\nHFXODEBOUNCE (rw) register accessor: an alias for …\nINTENCLR (rw) register accessor: an alias for …\nINTENSET (rw) register accessor: an alias for …\nLFCLKRUN (r) register accessor: an alias for …\nLFCLKSRC (rw) register accessor: an alias for …\nLFCLKSRCCOPY (r) register accessor: an alias for …\nLFCLKSTAT (r) register accessor: an alias for …\nLFRCMODE (rw) register accessor: an alias for …\nRegister block\nTASKS_CAL (w) register accessor: an alias for …\nTASKS_CTSTART (w) register accessor: an alias for …\nTASKS_CTSTOP (w) register accessor: an alias for …\nTASKS_HFCLKSTART (w) register accessor: an alias for …\nTASKS_HFCLKSTOP (w) register accessor: an alias for …\nTASKS_LFCLKSTART (w) register accessor: an alias for …\nTASKS_LFCLKSTOP (w) register accessor: an alias for …\nTRACECONFIG (rw) register accessor: an alias for …\nCalibration timer interval\n0x538 - Calibration timer interval\nCalibration timer has been started and is ready to process …\n0x128 - Calibration timer has been started and is ready to …\nCalibration timer has been stopped and is ready to process …\n0x12c - Calibration timer has been stopped and is ready to …\nCalibration timer timeout\n0x110 - Calibration timer timeout\nCalibration of LFRC completed\n0x10c - Calibration of LFRC completed\nHFXO crystal oscillator started\n0x100 - HFXO crystal oscillator started\nLFCLK started\n0x104 - LFCLK started\nReturns the argument unchanged.\nStatus indicating that HFCLKSTART task has been triggered\n0x408 - Status indicating that HFCLKSTART task has been …\nHFCLK status\n0x40c - HFCLK status\nHFXO debounce time. The HFXO is started by triggering the …\n0x528 - HFXO debounce time. The HFXO is started by …\nDisable interrupt\n0x308 - Disable interrupt\nEnable interrupt\n0x304 - Enable interrupt\nCalls U::from(self)
.\nStatus indicating that LFCLKSTART task has been triggered\n0x414 - Status indicating that LFCLKSTART task has been …\nClock source for the LFCLK\n0x518 - Clock source for the LFCLK\nCopy of LFCLKSRC register, set when LFCLKSTART task was …\n0x41c - Copy of LFCLKSRC register, set when LFCLKSTART …\nLFCLK status\n0x418 - LFCLK status\nLFRC mode configuration\n0x5b4 - LFRC mode configuration\nStart calibration of LFRC\n0x10 - Start calibration of LFRC\nStart calibration timer\n0x14 - Start calibration timer\nStop calibration timer\n0x18 - Stop calibration timer\nStart HFXO crystal oscillator\n0x00 - Start HFXO crystal oscillator\nStop HFXO crystal oscillator\n0x04 - Stop HFXO crystal oscillator\nStart LFCLK\n0x08 - Start LFCLK\nStop LFCLK\n0x0c - Stop LFCLK\nClocking options for the trace port debug interface\n0x55c - Clocking options for the trace port debug interface\nField CTIV
reader - Calibration timer interval in multiple …\nCalibration timer interval\nField CTIV
writer - Calibration timer interval in multiple …\nRegister CTIV
reader\nRegister CTIV
writer\nWrites raw bits to the register.\nBits 0:6 - Calibration timer interval in multiple of 0.25 …\nBits 0:6 - Calibration timer interval in multiple of 0.25 …\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_CTSTARTED
reader -\nCalibration timer has been started and is ready to process …\nField EVENTS_CTSTARTED
writer -\nRegister EVENTS_CTSTARTED
reader\nRegister EVENTS_CTSTARTED
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_CTSTOPPED
reader -\nCalibration timer has been stopped and is ready to process …\nField EVENTS_CTSTOPPED
writer -\nRegister EVENTS_CTSTOPPED
reader\nRegister EVENTS_CTSTOPPED
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_CTTO
reader -\nCalibration timer timeout\nField EVENTS_CTTO
writer -\nRegister EVENTS_CTTO
reader\nRegister EVENTS_CTTO
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_DONE
reader -\nCalibration of LFRC completed\nField EVENTS_DONE
writer -\nRegister EVENTS_DONE
reader\nRegister EVENTS_DONE
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_HFCLKSTARTED
reader -\nHFXO crystal oscillator started\nField EVENTS_HFCLKSTARTED
writer -\nRegister EVENTS_HFCLKSTARTED
reader\nRegister EVENTS_HFCLKSTARTED
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_LFCLKSTARTED
reader -\nLFCLK started\nField EVENTS_LFCLKSTARTED
writer -\nRegister EVENTS_LFCLKSTARTED
reader\nRegister EVENTS_LFCLKSTARTED
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nStatus indicating that HFCLKSTART task has been triggered\n0: Task not triggered\nRegister HFCLKRUN
reader\nHFCLKSTART task triggered or not\nField STATUS
reader - HFCLKSTART task triggered or not\n1: Task triggered\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is NOT_TRIGGERED
\nChecks if the value of the field is TRIGGERED
\nBit 0 - HFCLKSTART task triggered or not\nGet enumerated values variant\nHFCLK status\n0: HFCLK not running\nRegister HFCLKSTAT
reader\n0: 64 MHz internal oscillator (HFINT)\n1: HFCLK running\nSource of HFCLK\nField SRC
reader - Source of HFCLK\nHFCLK state\nField STATE
reader - HFCLK state\n1: 64 MHz crystal oscillator (HFXO)\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is NOT_RUNNING
\nChecks if the value of the field is RC
\nChecks if the value of the field is RUNNING
\nChecks if the value of the field is XTAL
\nBit 0 - Source of HFCLK\nBit 16 - HFCLK state\nGet enumerated values variant\nGet enumerated values variant\n64: 1024 us debounce time. Recommended for NX1612AA and …\n16: 256 us debounce time. Recommended for TSX-3225, FA-20H …\nHFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us.\nField HFXODEBOUNCE
reader - HFXO debounce time. Debounce …\nHFXO debounce time. The HFXO is started by triggering the …\nField HFXODEBOUNCE
writer - HFXO debounce time. Debounce …\nRegister HFXODEBOUNCE
reader\nRegister HFXODEBOUNCE
writer\nWrites raw bits to the register.\n1024 us debounce time. Recommended for NX1612AA and …\n256 us debounce time. Recommended for TSX-3225, FA-20H and …\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBits 0:7 - HFXO debounce time. Debounce time = …\nBits 0:7 - HFXO debounce time. Debounce time = …\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DB1024US
\nChecks if the value of the field is DB256US
\nGet enumerated values variant\n1: Disable\n1: Disable\n1: Disable\n1: Disable\n1: Disable\n1: Disable\nWrite ‘1’ to disable interrupt for CTSTARTED event\nWrite ‘1’ to disable interrupt for CTSTARTED event\nField CTSTARTED
reader - Write ‘1’ to disable …\nField CTSTARTED
writer - Write ‘1’ to disable …\nWrite ‘1’ to disable interrupt for CTSTOPPED event\nWrite ‘1’ to disable interrupt for CTSTOPPED event\nField CTSTOPPED
reader - Write ‘1’ to disable …\nField CTSTOPPED
writer - Write ‘1’ to disable …\nWrite ‘1’ to disable interrupt for CTTO event\nWrite ‘1’ to disable interrupt for CTTO event\nField CTTO
reader - Write ‘1’ to disable interrupt for …\nField CTTO
writer - Write ‘1’ to disable interrupt for …\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\nWrite ‘1’ to disable interrupt for DONE event\nWrite ‘1’ to disable interrupt for DONE event\nField DONE
reader - Write ‘1’ to disable interrupt for …\nField DONE
writer - Write ‘1’ to disable interrupt for …\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\nWrite ‘1’ to disable interrupt for HFCLKSTARTED event\nWrite ‘1’ to disable interrupt for HFCLKSTARTED event\nField HFCLKSTARTED
reader - Write ‘1’ to disable …\nField HFCLKSTARTED
writer - Write ‘1’ to disable …\nDisable interrupt\nWrite ‘1’ to disable interrupt for LFCLKSTARTED event\nWrite ‘1’ to disable interrupt for LFCLKSTARTED event\nField LFCLKSTARTED
reader - Write ‘1’ to disable …\nField LFCLKSTARTED
writer - Write ‘1’ to disable …\nRegister INTENCLR
reader\nRegister INTENCLR
writer\nWrites raw bits to the register.\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nBit 10 - Write ‘1’ to disable interrupt for CTSTARTED …\nBit 10 - Write ‘1’ to disable interrupt for CTSTARTED …\nBit 11 - Write ‘1’ to disable interrupt for CTSTOPPED …\nBit 11 - Write ‘1’ to disable interrupt for CTSTOPPED …\nBit 4 - Write ‘1’ to disable interrupt for CTTO event\nBit 4 - Write ‘1’ to disable interrupt for CTTO event\nBit 3 - Write ‘1’ to disable interrupt for DONE event\nBit 3 - Write ‘1’ to disable interrupt for DONE event\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBit 0 - Write ‘1’ to disable interrupt for …\nBit 0 - Write ‘1’ to disable interrupt for …\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nBit 1 - Write ‘1’ to disable interrupt for …\nBit 1 - Write ‘1’ to disable interrupt for …\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nWrite ‘1’ to enable interrupt for CTSTARTED event\nWrite ‘1’ to enable interrupt for CTSTARTED event\nField CTSTARTED
reader - Write ‘1’ to enable interrupt …\nField CTSTARTED
writer - Write ‘1’ to enable interrupt …\nWrite ‘1’ to enable interrupt for CTSTOPPED event\nWrite ‘1’ to enable interrupt for CTSTOPPED event\nField CTSTOPPED
reader - Write ‘1’ to enable interrupt …\nField CTSTOPPED
writer - Write ‘1’ to enable interrupt …\nWrite ‘1’ to enable interrupt for CTTO event\nWrite ‘1’ to enable interrupt for CTTO event\nField CTTO
reader - Write ‘1’ to enable interrupt for …\nField CTTO
writer - Write ‘1’ to enable interrupt for …\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\nWrite ‘1’ to enable interrupt for DONE event\nWrite ‘1’ to enable interrupt for DONE event\nField DONE
reader - Write ‘1’ to enable interrupt for …\nField DONE
writer - Write ‘1’ to enable interrupt for …\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\nWrite ‘1’ to enable interrupt for HFCLKSTARTED event\nWrite ‘1’ to enable interrupt for HFCLKSTARTED event\nField HFCLKSTARTED
reader - Write ‘1’ to enable …\nField HFCLKSTARTED
writer - Write ‘1’ to enable …\nEnable interrupt\nWrite ‘1’ to enable interrupt for LFCLKSTARTED event\nWrite ‘1’ to enable interrupt for LFCLKSTARTED event\nField LFCLKSTARTED
reader - Write ‘1’ to enable …\nField LFCLKSTARTED
writer - Write ‘1’ to enable …\nRegister INTENSET
reader\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\nRegister INTENSET
writer\nWrites raw bits to the register.\nBit 10 - Write ‘1’ to enable interrupt for CTSTARTED …\nBit 10 - Write ‘1’ to enable interrupt for CTSTARTED …\nBit 11 - Write ‘1’ to enable interrupt for CTSTOPPED …\nBit 11 - Write ‘1’ to enable interrupt for CTSTOPPED …\nBit 4 - Write ‘1’ to enable interrupt for CTTO event\nBit 4 - Write ‘1’ to enable interrupt for CTTO event\nBit 3 - Write ‘1’ to enable interrupt for DONE event\nBit 3 - Write ‘1’ to enable interrupt for DONE event\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBit 0 - Write ‘1’ to enable interrupt for HFCLKSTARTED …\nBit 0 - Write ‘1’ to enable interrupt for HFCLKSTARTED …\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nBit 1 - Write ‘1’ to enable interrupt for LFCLKSTARTED …\nBit 1 - Write ‘1’ to enable interrupt for LFCLKSTARTED …\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nStatus indicating that LFCLKSTART task has been triggered\n0: Task not triggered\nRegister LFCLKRUN
reader\nLFCLKSTART task triggered or not\nField STATUS
reader - LFCLKSTART task triggered or not\n1: Task triggered\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is NOT_TRIGGERED
\nChecks if the value of the field is TRIGGERED
\nBit 0 - LFCLKSTART task triggered or not\nGet enumerated values variant\nEnable or disable bypass of LFCLK crystal oscillator with …\nField BYPASS
reader - Enable or disable bypass of LFCLK …\nField BYPASS
writer - Enable or disable bypass of LFCLK …\n0: Disable (use with Xtal or low-swing external source)\n0: Disable external source (use with Xtal)\n1: Enable (use with rail-to-rail external source)\n1: Enable use of external source instead of Xtal (SRC …\nEnable or disable external source for LFCLK\nField EXTERNAL
reader - Enable or disable external source …\nField EXTERNAL
writer - Enable or disable external source …\nClock source for the LFCLK\nRegister LFCLKSRC
reader\n0: 32.768 kHz RC oscillator (LFRC)\nClock source\nField SRC
reader - Clock source\nField SRC
writer - Clock source\n2: 32.768 kHz synthesized from HFCLK (LFSYNT)\nRegister LFCLKSRC
writer\n1: 32.768 kHz crystal oscillator (LFXO)\nWrites raw bits to the register.\nBit 16 - Enable or disable bypass of LFCLK crystal …\nBit 16 - Enable or disable bypass of LFCLK crystal …\nDisable (use with Xtal or low-swing external source)\nDisable external source (use with Xtal)\nEnable (use with rail-to-rail external source)\nEnable use of external source instead of Xtal (SRC needs …\nBit 17 - Enable or disable external source for LFCLK\nBit 17 - Enable or disable external source for LFCLK\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is RC
\nChecks if the value of the field is SYNTH
\nChecks if the value of the field is XTAL
\n32.768 kHz RC oscillator (LFRC)\nBits 0:1 - Clock source\nBits 0:1 - Clock source\n32.768 kHz synthesized from HFCLK (LFSYNT)\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\n32.768 kHz crystal oscillator (LFXO)\nCopy of LFCLKSRC register, set when LFCLKSTART task was …\nRegister LFCLKSRCCOPY
reader\n0: 32.768 kHz RC oscillator (LFRC)\nClock source\nField SRC
reader - Clock source\n2: 32.768 kHz synthesized from HFCLK (LFSYNT)\n1: 32.768 kHz crystal oscillator (LFXO)\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is RC
\nChecks if the value of the field is SYNTH
\nChecks if the value of the field is XTAL
\nBits 0:1 - Clock source\nGet enumerated values variant\nLFCLK status\n0: LFCLK not running\nRegister LFCLKSTAT
reader\n0: 32.768 kHz RC oscillator (LFRC)\n1: LFCLK running\nSource of LFCLK\nField SRC
reader - Source of LFCLK\nLFCLK state\nField STATE
reader - LFCLK state\n2: 32.768 kHz synthesized from HFCLK (LFSYNT)\n1: 32.768 kHz crystal oscillator (LFXO)\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is NOT_RUNNING
\nChecks if the value of the field is RC
\nChecks if the value of the field is RUNNING
\nChecks if the value of the field is SYNTH
\nChecks if the value of the field is XTAL
\nBits 0:1 - Source of LFCLK\nBit 16 - LFCLK state\nGet enumerated values variant\nGet enumerated values variant\nLFRC mode configuration\nSet LFRC mode\nField MODE
reader - Set LFRC mode\nField MODE
writer - Set LFRC mode\n0: Normal mode\n0: Normal mode\nRegister LFRCMODE
reader\nActive LFRC mode. This field is read only.\nField STATUS
reader - Active LFRC mode. This field is read …\nField STATUS
writer - Active LFRC mode. This field is read …\n1: Ultra-low power mode (ULP)\n1: Ultra-low power mode (ULP)\nRegister LFRCMODE
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is NORMAL
\nChecks if the value of the field is NORMAL
\nChecks if the value of the field is ULP
\nChecks if the value of the field is ULP
\nBit 0 - Set LFRC mode\nBit 0 - Set LFRC mode\nNormal mode\nNormal mode\nBit 16 - Active LFRC mode. This field is read only.\nBit 16 - Active LFRC mode. This field is read only.\nUltra-low power mode (ULP)\nUltra-low power mode (ULP)\nGet enumerated values variant\nGet enumerated values variant\nStart calibration of LFRC\nField TASKS_CAL
writer -\nRegister TASKS_CAL
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStart calibration timer\nField TASKS_CTSTART
writer -\nRegister TASKS_CTSTART
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStop calibration timer\nField TASKS_CTSTOP
writer -\nRegister TASKS_CTSTOP
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStart HFXO crystal oscillator\nField TASKS_HFCLKSTART
writer -\nRegister TASKS_HFCLKSTART
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStop HFXO crystal oscillator\nField TASKS_HFCLKSTOP
writer -\nRegister TASKS_HFCLKSTOP
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStart LFCLK\nField TASKS_LFCLKSTART
writer -\nRegister TASKS_LFCLKSTART
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStop LFCLK\nField TASKS_LFCLKSTOP
writer -\nRegister TASKS_LFCLKSTOP
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\n0: No trace signals routed to pins. All pins can be used …\n2: All trace signals (TRACECLK and TRACEDATA[n]) routed to …\nRegister TRACECONFIG
reader\n1: SWO trace signal routed to pin. Remaining pins can be …\nClocking options for the trace port debug interface\nPin multiplexing of trace signals. See pin assignment …\nField TRACEMUX
reader - Pin multiplexing of trace signals. …\nField TRACEMUX
writer - Pin multiplexing of trace signals. …\nSpeed of trace port clock. Note that the TRACECLK pin will …\nField TRACEPORTSPEED
reader - Speed of trace port clock. …\nField TRACEPORTSPEED
writer - Speed of trace port clock. …\nRegister TRACECONFIG
writer\n1: 16 MHz trace port clock (TRACECLK = 8 MHz)\n16 MHz trace port clock (TRACECLK = 8 MHz)\n0: 32 MHz trace port clock (TRACECLK = 16 MHz)\n32 MHz trace port clock (TRACECLK = 16 MHz)\n3: 4 MHz trace port clock (TRACECLK = 2 MHz)\n4 MHz trace port clock (TRACECLK = 2 MHz)\n2: 8 MHz trace port clock (TRACECLK = 4 MHz)\n8 MHz trace port clock (TRACECLK = 4 MHz)\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nNo trace signals routed to pins. All pins can be used as …\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is _16MHZ
\nChecks if the value of the field is _32MHZ
\nChecks if the value of the field is _4MHZ
\nChecks if the value of the field is _8MHZ
\nChecks if the value of the field is GPIO
\nChecks if the value of the field is PARALLEL
\nChecks if the value of the field is SERIAL
\nAll trace signals (TRACECLK and TRACEDATA[n]) routed to …\nSWO trace signal routed to pin. Remaining pins can be used …\nBits 16:17 - Pin multiplexing of trace signals. See pin …\nBits 16:17 - Pin multiplexing of trace signals. See pin …\nBits 0:1 - Speed of trace port clock. Note that the …\nBits 0:1 - Speed of trace port clock. Note that the …\nGet enumerated values variant\nGet enumerated values variant\nENABLE (rw) register accessor: an alias for …\nEVENTS_CROSS (rw) register accessor: an alias for …\nEVENTS_DOWN (rw) register accessor: an alias for …\nEVENTS_READY (rw) register accessor: an alias for …\nEVENTS_UP (rw) register accessor: an alias for …\nEXTREFSEL (rw) register accessor: an alias for …\nHYST (rw) register accessor: an alias for Reg<HYST_SPEC>
\nINTEN (rw) register accessor: an alias for Reg<INTEN_SPEC>
\nINTENCLR (rw) register accessor: an alias for …\nINTENSET (rw) register accessor: an alias for …\nMODE (rw) register accessor: an alias for Reg<MODE_SPEC>
\nPSEL (rw) register accessor: an alias for Reg<PSEL_SPEC>
\nREFSEL (rw) register accessor: an alias for …\nRESULT (r) register accessor: an alias for Reg<RESULT_SPEC>
\nRegister block\nSHORTS (rw) register accessor: an alias for …\nTASKS_SAMPLE (w) register accessor: an alias for …\nTASKS_START (w) register accessor: an alias for …\nTASKS_STOP (w) register accessor: an alias for …\nTH (rw) register accessor: an alias for Reg<TH_SPEC>
\nCOMP enable\n0x500 - COMP enable\nDownward or upward crossing\n0x10c - Downward or upward crossing\nDownward crossing\n0x104 - Downward crossing\nCOMP is ready and output is valid\n0x100 - COMP is ready and output is valid\nUpward crossing\n0x108 - Upward crossing\nExternal reference select\n0x50c - External reference select\nReturns the argument unchanged.\nComparator hysteresis enable\n0x538 - Comparator hysteresis enable\nEnable or disable interrupt\n0x300 - Enable or disable interrupt\nDisable interrupt\n0x308 - Disable interrupt\nEnable interrupt\n0x304 - Enable interrupt\nCalls U::from(self)
.\nMode configuration\n0x534 - Mode configuration\nPin select\n0x504 - Pin select\nReference source select for single-ended mode\n0x508 - Reference source select for single-ended mode\nCompare result\n0x400 - Compare result\nShortcut register\n0x200 - Shortcut register\nSample comparator value\n0x08 - Sample comparator value\nStart comparator\n0x00 - Start comparator\nStop comparator\n0x04 - Stop comparator\nThreshold configuration for hysteresis unit\n0x530 - Threshold configuration for hysteresis unit\n0: Disable\n2: Enable\nEnable or disable COMP\nField ENABLE
reader - Enable or disable COMP\nCOMP enable\nField ENABLE
writer - Enable or disable COMP\nRegister ENABLE
reader\nRegister ENABLE
writer\nWrites raw bits to the register.\nDisable\nBits 0:1 - Enable or disable COMP\nBits 0:1 - Enable or disable COMP\nEnable\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nGet enumerated values variant\nField EVENTS_CROSS
reader -\nDownward or upward crossing\nField EVENTS_CROSS
writer -\nRegister EVENTS_CROSS
reader\nRegister EVENTS_CROSS
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_DOWN
reader -\nDownward crossing\nField EVENTS_DOWN
writer -\nRegister EVENTS_DOWN
reader\nRegister EVENTS_DOWN
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_READY
reader -\nCOMP is ready and output is valid\nField EVENTS_READY
writer -\nRegister EVENTS_READY
reader\nRegister EVENTS_READY
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_UP
reader -\nUpward crossing\nField EVENTS_UP
writer -\nRegister EVENTS_UP
reader\nRegister EVENTS_UP
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\n0: Use AIN0 as external analog reference\n1: Use AIN1 as external analog reference\n2: Use AIN2 as external analog reference\n3: Use AIN3 as external analog reference\n4: Use AIN4 as external analog reference\n5: Use AIN5 as external analog reference\n6: Use AIN6 as external analog reference\n7: Use AIN7 as external analog reference\nExternal analog reference select\nField EXTREFSEL
reader - External analog reference select\nExternal reference select\nField EXTREFSEL
writer - External analog reference select\nRegister EXTREFSEL
reader\nRegister EXTREFSEL
writer\nUse AIN0 as external analog reference\nUse AIN1 as external analog reference\nUse AIN2 as external analog reference\nUse AIN3 as external analog reference\nUse AIN4 as external analog reference\nUse AIN5 as external analog reference\nUse AIN6 as external analog reference\nUse AIN7 as external analog reference\nWrites raw bits to the register.\nBits 0:2 - External analog reference select\nBits 0:2 - External analog reference select\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is ANALOG_REFERENCE0
\nChecks if the value of the field is ANALOG_REFERENCE1
\nChecks if the value of the field is ANALOG_REFERENCE2
\nChecks if the value of the field is ANALOG_REFERENCE3
\nChecks if the value of the field is ANALOG_REFERENCE4
\nChecks if the value of the field is ANALOG_REFERENCE5
\nChecks if the value of the field is ANALOG_REFERENCE6
\nChecks if the value of the field is ANALOG_REFERENCE7
\nGet enumerated values variant\n1: Comparator hysteresis enabled\nComparator hysteresis\nField HYST
reader - Comparator hysteresis\nComparator hysteresis enable\nField HYST
writer - Comparator hysteresis\n0: Comparator hysteresis disabled\nRegister HYST
reader\nRegister HYST
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nBit 0 - Comparator hysteresis\nBit 0 - Comparator hysteresis\nComparator hysteresis enabled\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is HYST50M_V
\nChecks if the value of the field is NO_HYST
\nComparator hysteresis disabled\nGet enumerated values variant\nEnable or disable interrupt for CROSS event\nField CROSS
reader - Enable or disable interrupt for CROSS …\nField CROSS
writer - Enable or disable interrupt for CROSS …\n0: Disable\n0: Disable\n0: Disable\n0: Disable\nEnable or disable interrupt for DOWN event\nField DOWN
reader - Enable or disable interrupt for DOWN …\nField DOWN
writer - Enable or disable interrupt for DOWN …\n1: Enable\n1: Enable\n1: Enable\n1: Enable\nEnable or disable interrupt\nRegister INTEN
reader\nEnable or disable interrupt for READY event\nField READY
reader - Enable or disable interrupt for READY …\nField READY
writer - Enable or disable interrupt for READY …\nEnable or disable interrupt for UP event\nField UP
reader - Enable or disable interrupt for UP event\nField UP
writer - Enable or disable interrupt for UP event\nRegister INTEN
writer\nWrites raw bits to the register.\nBit 3 - Enable or disable interrupt for CROSS event\nBit 3 - Enable or disable interrupt for CROSS event\nDisable\nDisable\nDisable\nDisable\nBit 1 - Enable or disable interrupt for DOWN event\nBit 1 - Enable or disable interrupt for DOWN event\nEnable\nEnable\nEnable\nEnable\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nBit 0 - Enable or disable interrupt for READY event\nBit 0 - Enable or disable interrupt for READY event\nBit 2 - Enable or disable interrupt for UP event\nBit 2 - Enable or disable interrupt for UP event\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\n1: Disable\n1: Disable\n1: Disable\n1: Disable\nWrite ‘1’ to disable interrupt for CROSS event\nWrite ‘1’ to disable interrupt for CROSS event\nField CROSS
reader - Write ‘1’ to disable interrupt …\nField CROSS
writer - Write ‘1’ to disable interrupt …\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\nWrite ‘1’ to disable interrupt for DOWN event\nWrite ‘1’ to disable interrupt for DOWN event\nField DOWN
reader - Write ‘1’ to disable interrupt for …\nField DOWN
writer - Write ‘1’ to disable interrupt for …\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\nDisable interrupt\nRegister INTENCLR
reader\nWrite ‘1’ to disable interrupt for READY event\nWrite ‘1’ to disable interrupt for READY event\nField READY
reader - Write ‘1’ to disable interrupt …\nField READY
writer - Write ‘1’ to disable interrupt …\nWrite ‘1’ to disable interrupt for UP event\nWrite ‘1’ to disable interrupt for UP event\nField UP
reader - Write ‘1’ to disable interrupt for …\nField UP
writer - Write ‘1’ to disable interrupt for …\nRegister INTENCLR
writer\nWrites raw bits to the register.\nDisable\nDisable\nDisable\nDisable\nBit 3 - Write ‘1’ to disable interrupt for CROSS event\nBit 3 - Write ‘1’ to disable interrupt for CROSS event\nBit 1 - Write ‘1’ to disable interrupt for DOWN event\nBit 1 - Write ‘1’ to disable interrupt for DOWN event\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nBit 0 - Write ‘1’ to disable interrupt for READY event\nBit 0 - Write ‘1’ to disable interrupt for READY event\nBit 2 - Write ‘1’ to disable interrupt for UP event\nBit 2 - Write ‘1’ to disable interrupt for UP event\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nWrite ‘1’ to enable interrupt for CROSS event\nWrite ‘1’ to enable interrupt for CROSS event\nField CROSS
reader - Write ‘1’ to enable interrupt for …\nField CROSS
writer - Write ‘1’ to enable interrupt for …\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\n0: Read: Disabled\nWrite ‘1’ to enable interrupt for DOWN event\nWrite ‘1’ to enable interrupt for DOWN event\nField DOWN
reader - Write ‘1’ to enable interrupt for …\nField DOWN
writer - Write ‘1’ to enable interrupt for …\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\n1: Read: Enabled\nEnable interrupt\nRegister INTENSET
reader\nWrite ‘1’ to enable interrupt for READY event\nWrite ‘1’ to enable interrupt for READY event\nField READY
reader - Write ‘1’ to enable interrupt for …\nField READY
writer - Write ‘1’ to enable interrupt for …\n1: Enable\n1: Enable\n1: Enable\n1: Enable\nWrite ‘1’ to enable interrupt for UP event\nWrite ‘1’ to enable interrupt for UP event\nField UP
reader - Write ‘1’ to enable interrupt for UP …\nField UP
writer - Write ‘1’ to enable interrupt for UP …\nRegister INTENSET
writer\nWrites raw bits to the register.\nBit 3 - Write ‘1’ to enable interrupt for CROSS event\nBit 3 - Write ‘1’ to enable interrupt for CROSS event\nBit 1 - Write ‘1’ to enable interrupt for DOWN event\nBit 1 - Write ‘1’ to enable interrupt for DOWN event\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nBit 0 - Write ‘1’ to enable interrupt for READY event\nBit 0 - Write ‘1’ to enable interrupt for READY event\nEnable\nEnable\nEnable\nEnable\nBit 2 - Write ‘1’ to enable interrupt for UP event\nBit 2 - Write ‘1’ to enable interrupt for UP event\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\n1: Differential mode\n2: High-speed mode\n0: Low-power mode\nMain operation modes\nField MAIN
reader - Main operation modes\nField MAIN
writer - Main operation modes\nMode configuration\n1: Normal mode\nRegister MODE
reader\n0: Single-ended mode\nSpeed and power modes\nField SP
reader - Speed and power modes\nField SP
writer - Speed and power modes\nRegister MODE
writer\nWrites raw bits to the register.\nDifferential mode\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nHigh-speed mode\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DIFF
\nChecks if the value of the field is HIGH
\nChecks if the value of the field is LOW
\nChecks if the value of the field is NORMAL
\nChecks if the value of the field is SE
\nLow-power mode\nBit 8 - Main operation modes\nBit 8 - Main operation modes\nNormal mode\nSingle-ended mode\nBits 0:1 - Speed and power modes\nBits 0:1 - Speed and power modes\nGet enumerated values variant\nGet enumerated values variant\n0: AIN0 selected as analog input\n1: AIN1 selected as analog input\n2: AIN2 selected as analog input\n3: AIN3 selected as analog input\n4: AIN4 selected as analog input\n5: AIN5 selected as analog input\n6: AIN6 selected as analog input\n7: AIN7 selected as analog input\nAnalog pin select\nField PSEL
reader - Analog pin select\nPin select\nField PSEL
writer - Analog pin select\nRegister PSEL
reader\nRegister PSEL
writer\nAIN0 selected as analog input\nAIN1 selected as analog input\nAIN2 selected as analog input\nAIN3 selected as analog input\nAIN4 selected as analog input\nAIN5 selected as analog input\nAIN6 selected as analog input\nAIN7 selected as analog input\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is ANALOG_INPUT0
\nChecks if the value of the field is ANALOG_INPUT1
\nChecks if the value of the field is ANALOG_INPUT2
\nChecks if the value of the field is ANALOG_INPUT3
\nChecks if the value of the field is ANALOG_INPUT4
\nChecks if the value of the field is ANALOG_INPUT5
\nChecks if the value of the field is ANALOG_INPUT6
\nChecks if the value of the field is ANALOG_INPUT7
\nBits 0:2 - Analog pin select\nBits 0:2 - Analog pin select\nGet enumerated values variant\n5: VREF = AREF (VDD >= VREF >= AREFMIN)\n0: VREF = internal 1.2 V reference (VDD >= 1.7 V)\n1: VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V)\n2: VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V)\nRegister REFSEL
reader\nReference select\nField REFSEL
reader - Reference select\nReference source select for single-ended mode\nField REFSEL
writer - Reference select\n4: VREF = VDD\nRegister REFSEL
writer\nVREF = AREF (VDD >= VREF >= AREFMIN)\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nVREF = internal 1.2 V reference (VDD >= 1.7 V)\nVREF = internal 1.8 V reference (VDD >= VREF + 0.2 V)\nVREF = internal 2.4 V reference (VDD >= VREF + 0.2 V)\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is AREF
\nChecks if the value of the field is INT1V2
\nChecks if the value of the field is INT1V8
\nChecks if the value of the field is INT2V4
\nChecks if the value of the field is VDD
\nBits 0:2 - Reference select\nBits 0:2 - Reference select\nGet enumerated values variant\nVREF = VDD\n1: Input voltage is above the threshold (VIN+ > VIN-)\n0: Input voltage is below the threshold (VIN+ < VIN-)\nRegister RESULT
reader\nResult of last compare. Decision point SAMPLE task.\nField RESULT
reader - Result of last compare. Decision …\nCompare result\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is ABOVE
\nChecks if the value of the field is BELOW
\nBit 0 - Result of last compare. Decision point SAMPLE task.\nGet enumerated values variant\nShortcut between CROSS event and STOP task\nField CROSS_STOP
reader - Shortcut between CROSS event and …\nField CROSS_STOP
writer - Shortcut between CROSS event and …\n0: Disable shortcut\n0: Disable shortcut\n0: Disable shortcut\n0: Disable shortcut\n0: Disable shortcut\nShortcut between DOWN event and STOP task\nField DOWN_STOP
reader - Shortcut between DOWN event and …\nField DOWN_STOP
writer - Shortcut between DOWN event and …\n1: Enable shortcut\n1: Enable shortcut\n1: Enable shortcut\n1: Enable shortcut\n1: Enable shortcut\nRegister SHORTS
reader\nShortcut between READY event and SAMPLE task\nField READY_SAMPLE
reader - Shortcut between READY event …\nField READY_SAMPLE
writer - Shortcut between READY event …\nShortcut between READY event and STOP task\nField READY_STOP
reader - Shortcut between READY event and …\nField READY_STOP
writer - Shortcut between READY event and …\nShortcut register\nShortcut between UP event and STOP task\nField UP_STOP
reader - Shortcut between UP event and STOP …\nField UP_STOP
writer - Shortcut between UP event and STOP …\nRegister SHORTS
writer\nWrites raw bits to the register.\nBit 4 - Shortcut between CROSS event and STOP task\nBit 4 - Shortcut between CROSS event and STOP task\nDisable shortcut\nDisable shortcut\nDisable shortcut\nDisable shortcut\nDisable shortcut\nBit 2 - Shortcut between DOWN event and STOP task\nBit 2 - Shortcut between DOWN event and STOP task\nEnable shortcut\nEnable shortcut\nEnable shortcut\nEnable shortcut\nEnable shortcut\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nBit 0 - Shortcut between READY event and SAMPLE task\nBit 0 - Shortcut between READY event and SAMPLE task\nBit 1 - Shortcut between READY event and STOP task\nBit 1 - Shortcut between READY event and STOP task\nBit 3 - Shortcut between UP event and STOP task\nBit 3 - Shortcut between UP event and STOP task\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nGet enumerated values variant\nSample comparator value\nField TASKS_SAMPLE
writer -\nRegister TASKS_SAMPLE
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStart comparator\nField TASKS_START
writer -\nRegister TASKS_START
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nStop comparator\nField TASKS_STOP
writer -\nRegister TASKS_STOP
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nRegister TH
reader\nField THDOWN
reader - VDOWN = (THDOWN+1)/64*VREF\nField THDOWN
writer - VDOWN = (THDOWN+1)/64*VREF\nField THUP
reader - VUP = (THUP+1)/64*VREF\nField THUP
writer - VUP = (THUP+1)/64*VREF\nThreshold configuration for hysteresis unit\nRegister TH
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBits 0:5 - VDOWN = (THDOWN+1)/64*VREF\nBits 0:5 - VDOWN = (THDOWN+1)/64*VREF\nBits 8:13 - VUP = (THUP+1)/64*VREF\nBits 8:13 - VUP = (THUP+1)/64*VREF\nENABLE (rw) register accessor: an alias for …\nRegister block\nEnable CRYPTOCELL subsystem\n0x500 - Enable CRYPTOCELL subsystem\nReturns the argument unchanged.\nCalls U::from(self)
.\n0: CRYPTOCELL subsystem disabled\n1: CRYPTOCELL subsystem enabled\nEnable or disable the CRYPTOCELL subsystem\nField ENABLE
reader - Enable or disable the CRYPTOCELL …\nEnable CRYPTOCELL subsystem\nField ENABLE
writer - Enable or disable the CRYPTOCELL …\nRegister ENABLE
reader\nRegister ENABLE
writer\nWrites raw bits to the register.\nCRYPTOCELL subsystem disabled\nBit 0 - Enable or disable the CRYPTOCELL subsystem\nBit 0 - Enable or disable the CRYPTOCELL subsystem\nCRYPTOCELL subsystem enabled\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nGet enumerated values variant\nECBDATAPTR (rw) register accessor: an alias for …\nEVENTS_ENDECB (rw) register accessor: an alias for …\nEVENTS_ERRORECB (rw) register accessor: an alias for …\nINTENCLR (rw) register accessor: an alias for …\nINTENSET (rw) register accessor: an alias for …\nRegister block\nTASKS_STARTECB (w) register accessor: an alias for …\nTASKS_STOPECB (w) register accessor: an alias for …\nECB block encrypt memory pointers\n0x504 - ECB block encrypt memory pointers\nECB block encrypt complete\n0x100 - ECB block encrypt complete\nECB block encrypt aborted because of a STOPECB task or due …\n0x104 - ECB block encrypt aborted because of a STOPECB …\nReturns the argument unchanged.\nDisable interrupt\n0x308 - Disable interrupt\nEnable interrupt\n0x304 - Enable interrupt\nCalls U::from(self)
.\nStart ECB block encrypt\n0x00 - Start ECB block encrypt\nAbort a possible executing ECB operation\n0x04 - Abort a possible executing ECB operation\nField ECBDATAPTR
reader - Pointer to the ECB data …\nECB block encrypt memory pointers\nField ECBDATAPTR
writer - Pointer to the ECB data …\nRegister ECBDATAPTR
reader\nRegister ECBDATAPTR
writer\nWrites raw bits to the register.\nBits 0:31 - Pointer to the ECB data structure (see Table 1 …\nBits 0:31 - Pointer to the ECB data structure (see Table 1 …\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_ENDECB
reader -\nECB block encrypt complete\nField EVENTS_ENDECB
writer -\nRegister EVENTS_ENDECB
reader\nRegister EVENTS_ENDECB
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nField EVENTS_ERRORECB
reader -\nECB block encrypt aborted because of a STOPECB task or due …\nField EVENTS_ERRORECB
writer -\nRegister EVENTS_ERRORECB
reader\nRegister EVENTS_ERRORECB
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\n1: Disable\n1: Disable\n0: Read: Disabled\n0: Read: Disabled\n1: Read: Enabled\n1: Read: Enabled\nWrite ‘1’ to disable interrupt for ENDECB event\nWrite ‘1’ to disable interrupt for ENDECB event\nField ENDECB
reader - Write ‘1’ to disable interrupt …\nField ENDECB
writer - Write ‘1’ to disable interrupt …\nWrite ‘1’ to disable interrupt for ERRORECB event\nWrite ‘1’ to disable interrupt for ERRORECB event\nField ERRORECB
reader - Write ‘1’ to disable interrupt …\nField ERRORECB
writer - Write ‘1’ to disable interrupt …\nDisable interrupt\nRegister INTENCLR
reader\nRegister INTENCLR
writer\nWrites raw bits to the register.\nDisable\nDisable\nBit 0 - Write ‘1’ to disable interrupt for ENDECB event\nBit 0 - Write ‘1’ to disable interrupt for ENDECB event\nBit 1 - Write ‘1’ to disable interrupt for ERRORECB …\nBit 1 - Write ‘1’ to disable interrupt for ERRORECB …\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nGet enumerated values variant\nGet enumerated values variant\n0: Read: Disabled\n0: Read: Disabled\n1: Read: Enabled\n1: Read: Enabled\nWrite ‘1’ to enable interrupt for ENDECB event\nWrite ‘1’ to enable interrupt for ENDECB event\nField ENDECB
reader - Write ‘1’ to enable interrupt …\nField ENDECB
writer - Write ‘1’ to enable interrupt …\nWrite ‘1’ to enable interrupt for ERRORECB event\nWrite ‘1’ to enable interrupt for ERRORECB event\nField ERRORECB
reader - Write ‘1’ to enable interrupt …\nField ERRORECB
writer - Write ‘1’ to enable interrupt …\nEnable interrupt\nRegister INTENSET
reader\n1: Enable\n1: Enable\nRegister INTENSET
writer\nWrites raw bits to the register.\nBit 0 - Write ‘1’ to enable interrupt for ENDECB event\nBit 0 - Write ‘1’ to enable interrupt for ENDECB event\nBit 1 - Write ‘1’ to enable interrupt for ERRORECB …\nBit 1 - Write ‘1’ to enable interrupt for ERRORECB …\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is DISABLED
\nChecks if the value of the field is ENABLED
\nChecks if the value of the field is ENABLED
\nEnable\nEnable\nGet enumerated values variant\nGet enumerated values variant\nStart ECB block encrypt\nField TASKS_STARTECB
writer -\nRegister TASKS_STARTECB
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nAbort a possible executing ECB operation\nField TASKS_STOPECB
writer -\nRegister TASKS_STOPECB
writer\nWrites raw bits to the register.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nBit 0\nEVENTS_TRIGGERED (rw) register accessor: an alias for …\nINTEN (rw) register accessor: an alias for Reg<INTEN_SPEC>
\nINTENCLR (rw) register accessor: an alias for …\nINTENSET (rw) register accessor: an alias for …\nRegister block\nTASKS_TRIGGER (w) register accessor: an alias for …\nDescription collection[n]: Event number n generated by …\n0x100..0x140 - Description collection[n]: Event number n …\nReturns the argument unchanged.\nEnable or disable interrupt\n0x300 - Enable or disable interrupt\nDisable interrupt\n0x308 - Disable interrupt\nEnable interrupt\n0x304 - Enable interrupt\nCalls U::from(self)
.\nDescription collection[n]: Trigger n for triggering the …\n0x00..0x40 - Description collection[n]: Trigger n for …\nField EVENTS_TRIGGERED
reader -\nDescription collection[n]: Event number n generated by …\nField EVENTS_TRIGGERED
writer -\nRegister EVENTS_TRIGGERED[%s]
reader\nRegister EVENTS_TRIGGERED[%s]
writer\nWrites raw bits to the register.\nBit 0\nBit 0\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nCalls U::from(self)
.\nCalls U::from(self)
.\nCalls U::from(self)
.\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n0: Disable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\n1: Enable\nEnable or disable interrupt\nRegister INTEN
reader\nEnable or disable interrupt for TRIGGERED[0] event\nField TRIGGERED0
reader - Enable or disable interrupt for …\nField TRIGGERED0
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[10] event\nField TRIGGERED10
reader - Enable or disable interrupt for …\nField TRIGGERED10
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[11] event\nField TRIGGERED11
reader - Enable or disable interrupt for …\nField TRIGGERED11
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[12] event\nField TRIGGERED12
reader - Enable or disable interrupt for …\nField TRIGGERED12
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[13] event\nField TRIGGERED13
reader - Enable or disable interrupt for …\nField TRIGGERED13
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[14] event\nField TRIGGERED14
reader - Enable or disable interrupt for …\nField TRIGGERED14
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[15] event\nField TRIGGERED15
reader - Enable or disable interrupt for …\nField TRIGGERED15
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[1] event\nField TRIGGERED1
reader - Enable or disable interrupt for …\nField TRIGGERED1
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[2] event\nField TRIGGERED2
reader - Enable or disable interrupt for …\nField TRIGGERED2
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[3] event\nField TRIGGERED3
reader - Enable or disable interrupt for …\nField TRIGGERED3
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[4] event\nField TRIGGERED4
reader - Enable or disable interrupt for …\nField TRIGGERED4
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[5] event\nField TRIGGERED5
reader - Enable or disable interrupt for …\nField TRIGGERED5
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[6] event\nField TRIGGERED6
reader - Enable or disable interrupt for …\nField TRIGGERED6
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[7] event\nField TRIGGERED7
reader - Enable or disable interrupt for …\nField TRIGGERED7
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[8] event\nField TRIGGERED8
reader - Enable or disable interrupt for …\nField TRIGGERED8
writer - Enable or disable interrupt for …\nEnable or disable interrupt for TRIGGERED[9] event\nField TRIGGERED9
reader - Enable or disable interrupt for …\nField TRIGGERED9
writer - Enable or disable interrupt for …\nRegister INTEN
writer\nWrites raw bits to the register.\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nDisable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nEnable\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.\nReturns the argument unchanged.")