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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="API documentation for the Rust `regs` mod in crate `stm32_metapac`."><title>stm32_metapac::can::regs - Rust</title><script>if(window.location.protocol!=="file:")document.head.insertAdjacentHTML("beforeend","SourceSerif4-Regular-46f98efaafac5295.ttf.woff2,FiraSans-Regular-018c141bf0843ffd.woff2,FiraSans-Medium-8f9a781e4970d388.woff2,SourceCodePro-Regular-562dcc5011b6de7d.ttf.woff2,SourceCodePro-Semibold-d899c5a5c4aeb14a.ttf.woff2".split(",").map(f=>`<link rel="preload" as="font" type="font/woff2" crossorigin href="../../../static.files/${f}">`).join(""))</script><link rel="stylesheet" href="../../../static.files/normalize-76eba96aa4d2e634.css"><link rel="stylesheet" href="../../../static.files/rustdoc-492a78a4a87dcc01.css"><meta name="rustdoc-vars" data-root-path="../../../" data-static-root-path="../../../static.files/" data-current-crate="stm32_metapac" data-themes="" data-resource-suffix="" data-rustdoc-version="1.82.0 (f6e511eec 2024-10-15)" data-channel="1.82.0" data-search-js="search-a99f1315e7cc5121.js" data-settings-js="settings-4313503d2e1961c2.js" ><script src="../../../static.files/storage-118b08c4c78b968e.js"></script><script defer src="../sidebar-items.js"></script><script defer src="../../../static.files/main-921df33f47b8780c.js"></script><noscript><link rel="stylesheet" href="../../../static.files/noscript-3b12f09e550e0385.css"></noscript><link rel="alternate icon" type="image/png" href="../../../static.files/favicon-32x32-422f7d1d52889060.png"><link rel="icon" type="image/svg+xml" href="../../../static.files/favicon-2c020d218678b618.svg"></head><body class="rustdoc mod"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle" title="show sidebar"></button></nav><nav class="sidebar"><div class="sidebar-crate"><h2><a href="../../../stm32_metapac/index.html">stm32_<wbr>metapac</a><span class="version">15.0.0</span></h2></div><h2 class="location"><a href="#">Module regs</a></h2><div class="sidebar-elems"><section><ul class="block"><li><a href="#structs">Structs</a></li></ul></section><h2><a href="../index.html">In stm32_<wbr>metapac::<wbr>can</a></h2></div></nav><div class="sidebar-resizer"></div><main><div class="width-limiter"><rustdoc-search></rustdoc-search><section id="main-content" class="content"><div class="main-heading"><h1>Module <a href="../../index.html">stm32_metapac</a>::<wbr><a href="../index.html">can</a>::<wbr><a class="mod" href="#">regs</a><button id="copy-path" title="Copy item path to clipboard">Copy item path</button></h1><span class="out-of-band"><button id="toggle-all-docs" title="collapse all docs">[<span>&#x2212;</span>]</button></span></div><h2 id="structs" class="section-header">Structs<a href="#structs" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="struct" href="struct.Cccr.html" title="struct stm32_metapac::can::regs::Cccr">Cccr</a></div><div class="desc docblock-short">FDCAN CC Control Register</div></li><li><div class="item-name"><a class="struct" href="struct.Crel.html" title="struct stm32_metapac::can::regs::Crel">Crel</a></div><div class="desc docblock-short">FDCAN Core Release Register</div></li><li><div class="item-name"><a class="struct" href="struct.Dbtp.html" title="struct stm32_metapac::can::regs::Dbtp">Dbtp</a></div><div class="desc docblock-short">FDCAN Data Bit Timing and Prescaler Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ecr.html" title="struct stm32_metapac::can::regs::Ecr">Ecr</a></div><div class="desc docblock-short">FDCAN Error Counter Register</div></li><li><div class="item-name"><a class="struct" href="struct.Endn.html" title="struct stm32_metapac::can::regs::Endn">Endn</a></div><div class="desc docblock-short">FDCAN Core Release Register</div></li><li><div class="item-name"><a class="struct" href="struct.Gfc.html" title="struct stm32_metapac::can::regs::Gfc">Gfc</a></div><div class="desc docblock-short">FDCAN Global Filter Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Hpms.html" title="struct stm32_metapac::can::regs::Hpms">Hpms</a></div><div class="desc docblock-short">FDCAN High Priority Message Status Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ie.html" title="struct stm32_metapac::can::regs::Ie">Ie</a></div><div class="desc docblock-short">FDCAN Interrupt Enable Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ile.html" title="struct stm32_metapac::can::regs::Ile">Ile</a></div><div class="desc docblock-short">FDCAN Interrupt Line Enable Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ils.html" title="struct stm32_metapac::can::regs::Ils">Ils</a></div><div class="desc docblock-short">FDCAN Interrupt Line Select Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ir.html" title="struct stm32_metapac::can::regs::Ir">Ir</a></div><div class="desc docblock-short">FDCAN Interrupt Register</div></li><li><div class="item-name"><a class="struct" href="struct.Nbtp.html" title="struct stm32_metapac::can::regs::Nbtp">Nbtp</a></div><div class="desc docblock-short">FDCAN Nominal Bit Timing and Prescaler Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ndat1.html" title="struct stm32_metapac::can::regs::Ndat1">Ndat1</a></div><div class="desc docblock-short">FDCAN New Data 1 Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ndat2.html" title="struct stm32_metapac::can::regs::Ndat2">Ndat2</a></div><div class="desc docblock-short">FDCAN New Data 2 Register</div></li><li><div class="item-name"><a class="struct" href="struct.Psr.html" title="struct stm32_metapac::can::regs::Psr">Psr</a></div><div class="desc docblock-short">FDCAN Protocol Status Register</div></li><li><div class="item-name"><a class="struct" href="struct.Rwd.html" title="struct stm32_metapac::can::regs::Rwd">Rwd</a></div><div class="desc docblock-short">FDCAN RAM Watchdog Register</div></li><li><div class="item-name"><a class="struct" href="struct.Rxbc.html" title="struct stm32_metapac::can::regs::Rxbc">Rxbc</a></div><div class="desc docblock-short">FDCAN Rx Buffer Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Rxesc.html" title="struct stm32_metapac::can::regs::Rxesc">Rxesc</a></div><div class="desc docblock-short">FDCAN Rx Buffer Element Size Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Rxfa.html" title="struct stm32_metapac::can::regs::Rxfa">Rxfa</a></div><div class="desc docblock-short">CAN Rx FIFO X Acknowledge Register</div></li><li><div class="item-name"><a class="struct" href="struct.Rxfc.html" title="struct stm32_metapac::can::regs::Rxfc">Rxfc</a></div><div class="desc docblock-short">FDCAN Rx FIFO X Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Rxfs.html" title="struct stm32_metapac::can::regs::Rxfs">Rxfs</a></div><div class="desc docblock-short">FDCAN Rx FIFO X Status Register</div></li><li><div class="item-name"><a class="struct" href="struct.Sidfc.html" title="struct stm32_metapac::can::regs::Sidfc">Sidfc</a></div><div class="desc docblock-short">FDCAN Standard ID Filter Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Tdcr.html" title="struct stm32_metapac::can::regs::Tdcr">Tdcr</a></div><div class="desc docblock-short">FDCAN Transmitter Delay Compensation Register</div></li><li><div class="item-name"><a class="struct" href="struct.Test.html" title="struct stm32_metapac::can::regs::Test">Test</a></div><div class="desc docblock-short">FDCAN Test Register</div></li><li><div class="item-name"><a class="struct" href="struct.Tocc.html" title="struct stm32_metapac::can::regs::Tocc">Tocc</a></div><div class="desc docblock-short">FDCAN Timeout Counter Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Tocv.html" title="struct stm32_metapac::can::regs::Tocv">Tocv</a></div><div class="desc docblock-short">FDCAN Timeout Counter Value Register</div></li><li><div class="item-name"><a class="struct" href="struct.Tscc.html" title="struct stm32_metapac::can::regs::Tscc">Tscc</a></div><div class="desc docblock-short">FDCAN Timestamp Counter Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Tscv.html" title="struct stm32_metapac::can::regs::Tscv">Tscv</a></div><div class="desc docblock-short">FDCAN Timestamp Counter Value Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttcpt.html" title="struct stm32_metapac::can::regs::Ttcpt">Ttcpt</a></div><div class="desc docblock-short">FDCAN TT Capture Time Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttcsm.html" title="struct stm32_metapac::can::regs::Ttcsm">Ttcsm</a></div><div class="desc docblock-short">FDCAN TT Cycle Sync Mark Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttctc.html" title="struct stm32_metapac::can::regs::Ttctc">Ttctc</a></div><div class="desc docblock-short">FDCAN TT Cycle Time and Count Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttgtp.html" title="struct stm32_metapac::can::regs::Ttgtp">Ttgtp</a></div><div class="desc docblock-short">FDCAN TT Global Time Preset Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttie.html" title="struct stm32_metapac::can::regs::Ttie">Ttie</a></div><div class="desc docblock-short">FDCAN TT Interrupt Enable Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttils.html" title="struct stm32_metapac::can::regs::Ttils">Ttils</a></div><div class="desc docblock-short">FDCAN TT Interrupt Line Select Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttir.html" title="struct stm32_metapac::can::regs::Ttir">Ttir</a></div><div class="desc docblock-short">FDCAN TT Interrupt Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttlgt.html" title="struct stm32_metapac::can::regs::Ttlgt">Ttlgt</a></div><div class="desc docblock-short">FDCAN TT Local and Global Time Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttmlm.html" title="struct stm32_metapac::can::regs::Ttmlm">Ttmlm</a></div><div class="desc docblock-short">FDCAN TT Matrix Limits Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttocf.html" title="struct stm32_metapac::can::regs::Ttocf">Ttocf</a></div><div class="desc docblock-short">FDCAN TT Operation Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttocn.html" title="struct stm32_metapac::can::regs::Ttocn">Ttocn</a></div><div class="desc docblock-short">FDCAN TT Operation Control Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttost.html" title="struct stm32_metapac::can::regs::Ttost">Ttost</a></div><div class="desc docblock-short">FDCAN TT Operation Status Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttrmc.html" title="struct stm32_metapac::can::regs::Ttrmc">Ttrmc</a></div><div class="desc docblock-short">FDCAN TT Reference Message Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Tttmc.html" title="struct stm32_metapac::can::regs::Tttmc">Tttmc</a></div><div class="desc docblock-short">FDCAN TT Trigger Memory Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Tttmk.html" title="struct stm32_metapac::can::regs::Tttmk">Tttmk</a></div><div class="desc docblock-short">FDCAN TT Time Mark Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ttts.html" title="struct stm32_metapac::can::regs::Ttts">Ttts</a></div><div class="desc docblock-short">FDCAN TT Trigger Select Register</div></li><li><div class="item-name"><a class="struct" href="struct.Turcf.html" title="struct stm32_metapac::can::regs::Turcf">Turcf</a></div><div class="desc docblock-short">FDCAN TUR Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Turna.html" title="struct stm32_metapac::can::regs::Turna">Turna</a></div><div class="desc docblock-short">FDCAN TUR Numerator Actual Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txbar.html" title="struct stm32_metapac::can::regs::Txbar">Txbar</a></div><div class="desc docblock-short">FDCAN Tx Buffer Add Request Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txbc.html" title="struct stm32_metapac::can::regs::Txbc">Txbc</a></div><div class="desc docblock-short">FDCAN Tx Buffer Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txbcf.html" title="struct stm32_metapac::can::regs::Txbcf">Txbcf</a></div><div class="desc docblock-short">FDCAN Tx Buffer Cancellation Finished Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txbcie.html" title="struct stm32_metapac::can::regs::Txbcie">Txbcie</a></div><div class="desc docblock-short">FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txbcr.html" title="struct stm32_metapac::can::regs::Txbcr">Txbcr</a></div><div class="desc docblock-short">FDCAN Tx Buffer Cancellation Request Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txbrp.html" title="struct stm32_metapac::can::regs::Txbrp">Txbrp</a></div><div class="desc docblock-short">FDCAN Tx Buffer Request Pending Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txbtie.html" title="struct stm32_metapac::can::regs::Txbtie">Txbtie</a></div><div class="desc docblock-short">FDCAN Tx Buffer Transmission Interrupt Enable Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txbto.html" title="struct stm32_metapac::can::regs::Txbto">Txbto</a></div><div class="desc docblock-short">FDCAN Tx Buffer Transmission Occurred Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txefa.html" title="struct stm32_metapac::can::regs::Txefa">Txefa</a></div><div class="desc docblock-short">FDCAN Tx Event FIFO Acknowledge Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txefc.html" title="struct stm32_metapac::can::regs::Txefc">Txefc</a></div><div class="desc docblock-short">FDCAN Tx Event FIFO Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txefs.html" title="struct stm32_metapac::can::regs::Txefs">Txefs</a></div><div class="desc docblock-short">FDCAN Tx Event FIFO Status Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txesc.html" title="struct stm32_metapac::can::regs::Txesc">Txesc</a></div><div class="desc docblock-short">FDCAN Tx Buffer Element Size Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Txfqs.html" title="struct stm32_metapac::can::regs::Txfqs">Txfqs</a></div><div class="desc docblock-short">FDCAN Tx FIFO/Queue Status Register</div></li><li><div class="item-name"><a class="struct" href="struct.Xidam.html" title="struct stm32_metapac::can::regs::Xidam">Xidam</a></div><div class="desc docblock-short">FDCAN Extended ID and Mask Register</div></li><li><div class="item-name"><a class="struct" href="struct.Xidfc.html" title="struct stm32_metapac::can::regs::Xidfc">Xidfc</a></div><div class="desc docblock-short">FDCAN Extended ID Filter Configuration Register</div></li></ul></section></div></main></body></html>
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