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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="API documentation for the Rust `regs` mod in crate `stm32_metapac`."><title>stm32_metapac::rcc::regs - Rust</title><script>if(window.location.protocol!=="file:")document.head.insertAdjacentHTML("beforeend","SourceSerif4-Regular-46f98efaafac5295.ttf.woff2,FiraSans-Regular-018c141bf0843ffd.woff2,FiraSans-Medium-8f9a781e4970d388.woff2,SourceCodePro-Regular-562dcc5011b6de7d.ttf.woff2,SourceCodePro-Semibold-d899c5a5c4aeb14a.ttf.woff2".split(",").map(f=>`<link rel="preload" as="font" type="font/woff2" crossorigin href="../../../static.files/${f}">`).join(""))</script><link rel="stylesheet" href="../../../static.files/normalize-76eba96aa4d2e634.css"><link rel="stylesheet" href="../../../static.files/rustdoc-492a78a4a87dcc01.css"><meta name="rustdoc-vars" data-root-path="../../../" data-static-root-path="../../../static.files/" data-current-crate="stm32_metapac" data-themes="" data-resource-suffix="" data-rustdoc-version="1.82.0 (f6e511eec 2024-10-15)" data-channel="1.82.0" data-search-js="search-a99f1315e7cc5121.js" data-settings-js="settings-4313503d2e1961c2.js" ><script src="../../../static.files/storage-118b08c4c78b968e.js"></script><script defer src="../sidebar-items.js"></script><script defer src="../../../static.files/main-921df33f47b8780c.js"></script><noscript><link rel="stylesheet" href="../../../static.files/noscript-3b12f09e550e0385.css"></noscript><link rel="alternate icon" type="image/png" href="../../../static.files/favicon-32x32-422f7d1d52889060.png"><link rel="icon" type="image/svg+xml" href="../../../static.files/favicon-2c020d218678b618.svg"></head><body class="rustdoc mod"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle" title="show sidebar"></button></nav><nav class="sidebar"><div class="sidebar-crate"><h2><a href="../../../stm32_metapac/index.html">stm32_<wbr>metapac</a><span class="version">15.0.0</span></h2></div><h2 class="location"><a href="#">Module regs</a></h2><div class="sidebar-elems"><section><ul class="block"><li><a href="#structs">Structs</a></li></ul></section><h2><a href="../index.html">In stm32_<wbr>metapac::<wbr>rcc</a></h2></div></nav><div class="sidebar-resizer"></div><main><div class="width-limiter"><rustdoc-search></rustdoc-search><section id="main-content" class="content"><div class="main-heading"><h1>Module <a href="../../index.html">stm32_metapac</a>::<wbr><a href="../index.html">rcc</a>::<wbr><a class="mod" href="#">regs</a><button id="copy-path" title="Copy item path to clipboard">Copy item path</button></h1><span class="out-of-band"><button id="toggle-all-docs" title="collapse all docs">[<span>&#x2212;</span>]</button></span></div><h2 id="structs" class="section-header">Structs<a href="#structs" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="struct" href="struct.Ahb1enr.html" title="struct stm32_metapac::rcc::regs::Ahb1enr">Ahb1enr</a></div><div class="desc docblock-short">RCC AHB1 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb1lpenr.html" title="struct stm32_metapac::rcc::regs::Ahb1lpenr">Ahb1lpenr</a></div><div class="desc docblock-short">RCC AHB1 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb1rstr.html" title="struct stm32_metapac::rcc::regs::Ahb1rstr">Ahb1rstr</a></div><div class="desc docblock-short">RCC AHB1 Peripheral Reset Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb2enr.html" title="struct stm32_metapac::rcc::regs::Ahb2enr">Ahb2enr</a></div><div class="desc docblock-short">RCC AHB2 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb2lpenr.html" title="struct stm32_metapac::rcc::regs::Ahb2lpenr">Ahb2lpenr</a></div><div class="desc docblock-short">RCC AHB2 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb2rstr.html" title="struct stm32_metapac::rcc::regs::Ahb2rstr">Ahb2rstr</a></div><div class="desc docblock-short">RCC AHB2 Peripheral Reset Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb3enr.html" title="struct stm32_metapac::rcc::regs::Ahb3enr">Ahb3enr</a></div><div class="desc docblock-short">RCC AHB3 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb3lpenr.html" title="struct stm32_metapac::rcc::regs::Ahb3lpenr">Ahb3lpenr</a></div><div class="desc docblock-short">RCC AHB3 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb3rstr.html" title="struct stm32_metapac::rcc::regs::Ahb3rstr">Ahb3rstr</a></div><div class="desc docblock-short">RCC AHB3 Reset Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb4enr.html" title="struct stm32_metapac::rcc::regs::Ahb4enr">Ahb4enr</a></div><div class="desc docblock-short">RCC AHB4 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb4lpenr.html" title="struct stm32_metapac::rcc::regs::Ahb4lpenr">Ahb4lpenr</a></div><div class="desc docblock-short">RCC AHB4 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Ahb4rstr.html" title="struct stm32_metapac::rcc::regs::Ahb4rstr">Ahb4rstr</a></div><div class="desc docblock-short">RCC AHB4 Peripheral Reset Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb1henr.html" title="struct stm32_metapac::rcc::regs::Apb1henr">Apb1henr</a></div><div class="desc docblock-short">RCC APB1 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb1hlpenr.html" title="struct stm32_metapac::rcc::regs::Apb1hlpenr">Apb1hlpenr</a></div><div class="desc docblock-short">RCC APB1 High Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb1hrstr.html" title="struct stm32_metapac::rcc::regs::Apb1hrstr">Apb1hrstr</a></div><div class="desc docblock-short">RCC APB1 Peripheral Reset Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb1lenr.html" title="struct stm32_metapac::rcc::regs::Apb1lenr">Apb1lenr</a></div><div class="desc docblock-short">RCC APB1 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb1llpenr.html" title="struct stm32_metapac::rcc::regs::Apb1llpenr">Apb1llpenr</a></div><div class="desc docblock-short">RCC APB1 Low Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb1lrstr.html" title="struct stm32_metapac::rcc::regs::Apb1lrstr">Apb1lrstr</a></div><div class="desc docblock-short">RCC APB1 Peripheral Reset Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb2enr.html" title="struct stm32_metapac::rcc::regs::Apb2enr">Apb2enr</a></div><div class="desc docblock-short">RCC APB2 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb2lpenr.html" title="struct stm32_metapac::rcc::regs::Apb2lpenr">Apb2lpenr</a></div><div class="desc docblock-short">RCC APB2 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb2rstr.html" title="struct stm32_metapac::rcc::regs::Apb2rstr">Apb2rstr</a></div><div class="desc docblock-short">RCC APB2 Peripheral Reset Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb3enr.html" title="struct stm32_metapac::rcc::regs::Apb3enr">Apb3enr</a></div><div class="desc docblock-short">RCC APB3 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb3lpenr.html" title="struct stm32_metapac::rcc::regs::Apb3lpenr">Apb3lpenr</a></div><div class="desc docblock-short">RCC APB3 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb3rstr.html" title="struct stm32_metapac::rcc::regs::Apb3rstr">Apb3rstr</a></div><div class="desc docblock-short">RCC APB3 Peripheral Reset Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb4enr.html" title="struct stm32_metapac::rcc::regs::Apb4enr">Apb4enr</a></div><div class="desc docblock-short">RCC APB4 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb4lpenr.html" title="struct stm32_metapac::rcc::regs::Apb4lpenr">Apb4lpenr</a></div><div class="desc docblock-short">RCC APB4 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.Apb4rstr.html" title="struct stm32_metapac::rcc::regs::Apb4rstr">Apb4rstr</a></div><div class="desc docblock-short">RCC APB4 Peripheral Reset Register</div></li><li><div class="item-name"><a class="struct" href="struct.Bdcr.html" title="struct stm32_metapac::rcc::regs::Bdcr">Bdcr</a></div><div class="desc docblock-short">RCC Backup Domain Control Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Ahb1enr.html" title="struct stm32_metapac::rcc::regs::C1Ahb1enr">C1Ahb1enr</a></div><div class="desc docblock-short">RCC AHB1 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Ahb1lpenr.html" title="struct stm32_metapac::rcc::regs::C1Ahb1lpenr">C1Ahb1lpenr</a></div><div class="desc docblock-short">RCC AHB1 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Ahb2enr.html" title="struct stm32_metapac::rcc::regs::C1Ahb2enr">C1Ahb2enr</a></div><div class="desc docblock-short">RCC AHB2 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Ahb2lpenr.html" title="struct stm32_metapac::rcc::regs::C1Ahb2lpenr">C1Ahb2lpenr</a></div><div class="desc docblock-short">RCC AHB2 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Ahb3enr.html" title="struct stm32_metapac::rcc::regs::C1Ahb3enr">C1Ahb3enr</a></div><div class="desc docblock-short">RCC AHB3 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Ahb3lpenr.html" title="struct stm32_metapac::rcc::regs::C1Ahb3lpenr">C1Ahb3lpenr</a></div><div class="desc docblock-short">RCC AHB3 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Ahb4enr.html" title="struct stm32_metapac::rcc::regs::C1Ahb4enr">C1Ahb4enr</a></div><div class="desc docblock-short">RCC AHB4 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Ahb4lpenr.html" title="struct stm32_metapac::rcc::regs::C1Ahb4lpenr">C1Ahb4lpenr</a></div><div class="desc docblock-short">RCC AHB4 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Apb1henr.html" title="struct stm32_metapac::rcc::regs::C1Apb1henr">C1Apb1henr</a></div><div class="desc docblock-short">RCC APB1 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Apb1hlpenr.html" title="struct stm32_metapac::rcc::regs::C1Apb1hlpenr">C1Apb1hlpenr</a></div><div class="desc docblock-short">RCC APB1 High Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Apb1lenr.html" title="struct stm32_metapac::rcc::regs::C1Apb1lenr">C1Apb1lenr</a></div><div class="desc docblock-short">RCC APB1 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Apb1llpenr.html" title="struct stm32_metapac::rcc::regs::C1Apb1llpenr">C1Apb1llpenr</a></div><div class="desc docblock-short">RCC APB1 Low Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Apb2enr.html" title="struct stm32_metapac::rcc::regs::C1Apb2enr">C1Apb2enr</a></div><div class="desc docblock-short">RCC APB2 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Apb2lpenr.html" title="struct stm32_metapac::rcc::regs::C1Apb2lpenr">C1Apb2lpenr</a></div><div class="desc docblock-short">RCC APB2 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Apb3enr.html" title="struct stm32_metapac::rcc::regs::C1Apb3enr">C1Apb3enr</a></div><div class="desc docblock-short">RCC APB3 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Apb3lpenr.html" title="struct stm32_metapac::rcc::regs::C1Apb3lpenr">C1Apb3lpenr</a></div><div class="desc docblock-short">RCC APB3 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Apb4enr.html" title="struct stm32_metapac::rcc::regs::C1Apb4enr">C1Apb4enr</a></div><div class="desc docblock-short">RCC APB4 Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Apb4lpenr.html" title="struct stm32_metapac::rcc::regs::C1Apb4lpenr">C1Apb4lpenr</a></div><div class="desc docblock-short">RCC APB4 Sleep Clock Register</div></li><li><div class="item-name"><a class="struct" href="struct.C1Rsr.html" title="struct stm32_metapac::rcc::regs::C1Rsr">C1Rsr</a></div><div class="desc docblock-short">RCC Reset Status Register</div></li><li><div class="item-name"><a class="struct" href="struct.Cfgr.html" title="struct stm32_metapac::rcc::regs::Cfgr">Cfgr</a></div><div class="desc docblock-short">RCC Clock Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Cicr.html" title="struct stm32_metapac::rcc::regs::Cicr">Cicr</a></div><div class="desc docblock-short">RCC Clock Source Interrupt Clear Register</div></li><li><div class="item-name"><a class="struct" href="struct.Cier.html" title="struct stm32_metapac::rcc::regs::Cier">Cier</a></div><div class="desc docblock-short">RCC Clock Source Interrupt Enable Register</div></li><li><div class="item-name"><a class="struct" href="struct.Cifr.html" title="struct stm32_metapac::rcc::regs::Cifr">Cifr</a></div><div class="desc docblock-short">RCC Clock Source Interrupt Flag Register</div></li><li><div class="item-name"><a class="struct" href="struct.Cr.html" title="struct stm32_metapac::rcc::regs::Cr">Cr</a></div><div class="desc docblock-short">clock control register</div></li><li><div class="item-name"><a class="struct" href="struct.Crrcr.html" title="struct stm32_metapac::rcc::regs::Crrcr">Crrcr</a></div><div class="desc docblock-short">RCC Clock Recovery RC Register</div></li><li><div class="item-name"><a class="struct" href="struct.Csicfgr.html" title="struct stm32_metapac::rcc::regs::Csicfgr">Csicfgr</a></div><div class="desc docblock-short">RCC CSI configuration register</div></li><li><div class="item-name"><a class="struct" href="struct.Csr.html" title="struct stm32_metapac::rcc::regs::Csr">Csr</a></div><div class="desc docblock-short">RCC Clock Control and Status Register</div></li><li><div class="item-name"><a class="struct" href="struct.D1ccipr.html" title="struct stm32_metapac::rcc::regs::D1ccipr">D1ccipr</a></div><div class="desc docblock-short">RCC Domain 1 Kernel Clock Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.D1cfgr.html" title="struct stm32_metapac::rcc::regs::D1cfgr">D1cfgr</a></div><div class="desc docblock-short">RCC Domain 1 Clock Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.D2ccip1r.html" title="struct stm32_metapac::rcc::regs::D2ccip1r">D2ccip1r</a></div><div class="desc docblock-short">RCC Domain 2 Kernel Clock Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.D2ccip2r.html" title="struct stm32_metapac::rcc::regs::D2ccip2r">D2ccip2r</a></div><div class="desc docblock-short">RCC Domain 2 Kernel Clock Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.D2cfgr.html" title="struct stm32_metapac::rcc::regs::D2cfgr">D2cfgr</a></div><div class="desc docblock-short">RCC Domain 2 Clock Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.D3amr.html" title="struct stm32_metapac::rcc::regs::D3amr">D3amr</a></div><div class="desc docblock-short">RCC D3 Autonomous mode Register</div></li><li><div class="item-name"><a class="struct" href="struct.D3ccipr.html" title="struct stm32_metapac::rcc::regs::D3ccipr">D3ccipr</a></div><div class="desc docblock-short">RCC Domain 3 Kernel Clock Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.D3cfgr.html" title="struct stm32_metapac::rcc::regs::D3cfgr">D3cfgr</a></div><div class="desc docblock-short">RCC Domain 3 Clock Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Gcr.html" title="struct stm32_metapac::rcc::regs::Gcr">Gcr</a></div><div class="desc docblock-short">Global Control Register</div></li><li><div class="item-name"><a class="struct" href="struct.Hsicfgr.html" title="struct stm32_metapac::rcc::regs::Hsicfgr">Hsicfgr</a></div><div class="desc docblock-short">RCC HSI configuration register</div></li><li><div class="item-name"><a class="struct" href="struct.Icscr.html" title="struct stm32_metapac::rcc::regs::Icscr">Icscr</a></div><div class="desc docblock-short">RCC Internal Clock Source Calibration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Pllcfgr.html" title="struct stm32_metapac::rcc::regs::Pllcfgr">Pllcfgr</a></div><div class="desc docblock-short">RCC PLLs Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Pllckselr.html" title="struct stm32_metapac::rcc::regs::Pllckselr">Pllckselr</a></div><div class="desc docblock-short">RCC PLLs Clock Source Selection Register</div></li><li><div class="item-name"><a class="struct" href="struct.Plldivr.html" title="struct stm32_metapac::rcc::regs::Plldivr">Plldivr</a></div><div class="desc docblock-short">RCC PLL1 Dividers Configuration Register</div></li><li><div class="item-name"><a class="struct" href="struct.Pllfracr.html" title="struct stm32_metapac::rcc::regs::Pllfracr">Pllfracr</a></div><div class="desc docblock-short">RCC PLL Fractional Divider Register</div></li><li><div class="item-name"><a class="struct" href="struct.Rsr.html" title="struct stm32_metapac::rcc::regs::Rsr">Rsr</a></div><div class="desc docblock-short">RCC Reset Status Register</div></li></ul></section></div></main></body></html>
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