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Real-Time Interrupt-driven Concurrency (RTIC) framework for ARM Cortex-M microcontrollers
759ac160db
it can be used to break references rules within nested locks ``` rust static R1: Resource<bool, C1> = unsafe { Resource::new(false) }; static R2: Resource<bool, C2> = unsafe { Resource::new(false) }; static R3: Resource<bool, C3> = unsafe { Resource::new(false) }; // Priority = 1 extern "C" fn j1(task: interrupt::Exti0Irq) { R1.lock(&task, |r1, c1| { R2.lock(&task, |r2, c2| { R3.lock(&task, |r3, mut c3| { // BAD &- and &mut - that point to the same data let r1_ref: &bool = R1.borrow(&c2); let r1_ref_mut: &mut bool = R1.borrow_mut(&mut c3); }); }); }); } ``` |
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build.rs | ||
Cargo.toml | ||
LICENSE-APACHE | ||
LICENSE-MIT | ||
README.md |
cortex-m-srp
License
Licensed under either of
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Apache License, Version 2.0 (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
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MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)
at your option.
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