mirror of
https://github.com/rtic-rs/rtic.git
synced 2024-11-29 23:14:34 +01:00
183 lines
5.7 KiB
Rust
183 lines
5.7 KiB
Rust
fn main() {
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#[cfg(feature = "stm32-metapac")]
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stm32();
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println!("cargo:rerun-if-changed=build.rs");
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}
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#[cfg(feature = "stm32-metapac")]
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fn stm32() {
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use std::path::PathBuf;
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use std::{env, fs};
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use proc_macro2::TokenStream;
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use quote::{format_ident, quote};
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use stm32_metapac::metadata::METADATA;
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let chip_name = match env::vars()
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.map(|(a, _)| a)
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.filter(|x| {
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!x.starts_with("CARGO_FEATURE_STM32_METAPAC")
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&& !x.starts_with("CARGO_FEATURE_STM32_TIM")
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&& x.starts_with("CARGO_FEATURE_STM32")
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})
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.get_one()
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{
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Ok(x) => x,
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Err(GetOneError::None) => panic!("No stm32xx Cargo feature enabled"),
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Err(GetOneError::Multiple) => panic!("Multiple stm32xx Cargo features enabled"),
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}
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.strip_prefix("CARGO_FEATURE_")
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.unwrap()
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.to_ascii_lowercase();
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// Allows to just use #[cfg(stm32)] if one of the stm32 chips is used.
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println!("cargo:rustc-cfg=stm32");
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for p in METADATA.peripherals {
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if let Some(r) = &p.registers {
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println!("cargo:rustc-cfg={}", r.kind);
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println!("cargo:rustc-cfg={}_{}", r.kind, r.version);
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}
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}
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// ========
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// Generate singletons
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let mut singletons: Vec<String> = Vec::new();
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for p in METADATA.peripherals {
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if !p.name.contains("TIM") {
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continue;
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}
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if let Some(r) = &p.registers {
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match r.kind {
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// Generate singletons per pin, not per port
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"gpio" => {
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println!("{}", p.name);
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let port_letter = p.name.strip_prefix("GPIO").unwrap();
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for pin_num in 0..16 {
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singletons.push(format!("P{}{}", port_letter, pin_num));
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}
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}
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// No singleton for these, the HAL handles them specially.
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"exti" => {}
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// We *shouldn't* have singletons for these, but the HAL currently requires
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// singletons, for using with RccPeripheral to enable/disable clocks to them.
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"rcc" => {
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if r.version.starts_with("h5")
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|| r.version.starts_with("h7")
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|| r.version.starts_with("f4")
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{
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singletons.push("MCO1".to_string());
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singletons.push("MCO2".to_string());
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}
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if r.version.starts_with("l4") {
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singletons.push("MCO".to_string());
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}
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singletons.push(p.name.to_string());
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}
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//"dbgmcu" => {}
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//"syscfg" => {}
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//"dma" => {}
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//"bdma" => {}
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//"dmamux" => {}
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// For other peripherals, one singleton per peri
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_ => singletons.push(p.name.to_string()),
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}
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}
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}
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let mut g = TokenStream::new();
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// ========
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// Generate RccPeripheral impls
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for p in METADATA.peripherals {
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if !singletons.contains(&p.name.to_string()) {
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continue;
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}
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if let Some(rcc) = &p.rcc {
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let en = rcc.enable.as_ref().unwrap();
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let rst = match &rcc.reset {
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Some(rst) => {
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let rst_reg = format_ident!("{}", rst.register.to_ascii_lowercase());
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let set_rst_field = format_ident!("set_{}", rst.field.to_ascii_lowercase());
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quote! {
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stm32_metapac::RCC.#rst_reg().modify(|w| w.#set_rst_field(true));
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stm32_metapac::RCC.#rst_reg().modify(|w| w.#set_rst_field(false));
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}
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}
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None => TokenStream::new(),
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};
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let after_enable = if chip_name.starts_with("stm32f2") {
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// Errata: ES0005 - 2.1.11 Delay after an RCC peripheral clock enabling
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quote! {
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cortex_m::asm::dsb();
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}
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} else {
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TokenStream::new()
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};
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let pname = format_ident!("{}", p.name);
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let en_reg = format_ident!("{}", en.register.to_ascii_lowercase());
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let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase());
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g.extend(quote! {
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#[doc(hidden)]
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pub mod #pname {
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pub fn enable() {
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stm32_metapac::RCC.#en_reg().modify(|w| w.#set_en_field(true));
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#after_enable
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}
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pub fn reset() {
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#rst
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}
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}
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});
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}
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}
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// ========
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// Generate NVIC impl
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let prio_bits = METADATA.nvic_priority_bits;
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g.extend(quote! {
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pub const NVIC_PRIO_BITS: u8 = #prio_bits;
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});
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// ========
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// Write generated.rs
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let out_dir = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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let out_file = out_dir.join("_generated.rs").to_string_lossy().to_string();
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fs::write(out_file, g.to_string()).unwrap();
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}
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#[cfg(feature = "stm32-metapac")]
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enum GetOneError {
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None,
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Multiple,
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}
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#[cfg(feature = "stm32-metapac")]
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trait IteratorExt: Iterator {
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fn get_one(self) -> Result<Self::Item, GetOneError>;
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}
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#[cfg(feature = "stm32-metapac")]
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impl<T: Iterator> IteratorExt for T {
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fn get_one(mut self) -> Result<Self::Item, GetOneError> {
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match self.next() {
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None => Err(GetOneError::None),
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Some(res) => match self.next() {
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Some(_) => Err(GetOneError::Multiple),
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None => Ok(res),
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},
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}
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}
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}
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