mirror of
https://github.com/rtic-rs/rtic.git
synced 2024-11-26 05:29:38 +01:00
1 line
No EOL
43 KiB
HTML
1 line
No EOL
43 KiB
HTML
<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="API documentation for the Rust `iomuxc` mod in crate `imxrt_ral`."><title>imxrt_ral::iomuxc - Rust</title><script>if(window.location.protocol!=="file:")document.head.insertAdjacentHTML("beforeend","SourceSerif4-Regular-46f98efaafac5295.ttf.woff2,FiraSans-Regular-018c141bf0843ffd.woff2,FiraSans-Medium-8f9a781e4970d388.woff2,SourceCodePro-Regular-562dcc5011b6de7d.ttf.woff2,SourceCodePro-Semibold-d899c5a5c4aeb14a.ttf.woff2".split(",").map(f=>`<link rel="preload" as="font" type="font/woff2" crossorigin href="../../static.files/${f}">`).join(""))</script><link rel="stylesheet" href="../../static.files/normalize-76eba96aa4d2e634.css"><link rel="stylesheet" href="../../static.files/rustdoc-492a78a4a87dcc01.css"><meta name="rustdoc-vars" data-root-path="../../" data-static-root-path="../../static.files/" data-current-crate="imxrt_ral" data-themes="" data-resource-suffix="" data-rustdoc-version="1.82.0 (f6e511eec 2024-10-15)" data-channel="1.82.0" data-search-js="search-a99f1315e7cc5121.js" data-settings-js="settings-4313503d2e1961c2.js" ><script src="../../static.files/storage-118b08c4c78b968e.js"></script><script defer src="../sidebar-items.js"></script><script defer src="../../static.files/main-921df33f47b8780c.js"></script><noscript><link rel="stylesheet" href="../../static.files/noscript-3b12f09e550e0385.css"></noscript><link rel="alternate icon" type="image/png" href="../../static.files/favicon-32x32-422f7d1d52889060.png"><link rel="icon" type="image/svg+xml" href="../../static.files/favicon-2c020d218678b618.svg"></head><body class="rustdoc mod"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle" title="show sidebar"></button></nav><nav class="sidebar"><div class="sidebar-crate"><h2><a href="../../imxrt_ral/index.html">imxrt_<wbr>ral</a><span class="version">0.5.3</span></h2></div><h2 class="location"><a href="#">Module iomuxc</a></h2><div class="sidebar-elems"><section><ul class="block"><li><a href="#modules">Modules</a></li><li><a href="#structs">Structs</a></li><li><a href="#constants">Constants</a></li><li><a href="#functions">Functions</a></li><li><a href="#types">Type Aliases</a></li></ul></section><h2><a href="../index.html">In crate imxrt_<wbr>ral</a></h2></div></nav><div class="sidebar-resizer"></div><main><div class="width-limiter"><rustdoc-search></rustdoc-search><section id="main-content" class="content"><div class="main-heading"><h1>Module <a href="../index.html">imxrt_ral</a>::<wbr><a class="mod" href="#">iomuxc</a><button id="copy-path" title="Copy item path to clipboard">Copy item path</button></h1><span class="out-of-band"><a class="src" href="../../src/imxrt_ral/imxrt1011.rs.html#924">source</a> · <button id="toggle-all-docs" title="collapse all docs">[<span>−</span>]</button></span></div><h2 id="modules" class="section-header">Modules<a href="#modules" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="mod" href="FLEXPWM1_PWMA_SELECT_INPUT_0/index.html" title="mod imxrt_ral::iomuxc::FLEXPWM1_PWMA_SELECT_INPUT_0">FLEXPW<wbr>M1_<wbr>PWMA_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>0</a></div><div class="desc docblock-short">FLEXPWM1_PWMA_SELECT_INPUT_0 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="FLEXPWM1_PWMA_SELECT_INPUT_1/index.html" title="mod imxrt_ral::iomuxc::FLEXPWM1_PWMA_SELECT_INPUT_1">FLEXPW<wbr>M1_<wbr>PWMA_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>1</a></div><div class="desc docblock-short">FLEXPWM1_PWMA_SELECT_INPUT_1 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="FLEXPWM1_PWMA_SELECT_INPUT_2/index.html" title="mod imxrt_ral::iomuxc::FLEXPWM1_PWMA_SELECT_INPUT_2">FLEXPW<wbr>M1_<wbr>PWMA_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>2</a></div><div class="desc docblock-short">FLEXPWM1_PWMA_SELECT_INPUT_2 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="FLEXPWM1_PWMA_SELECT_INPUT_3/index.html" title="mod imxrt_ral::iomuxc::FLEXPWM1_PWMA_SELECT_INPUT_3">FLEXPW<wbr>M1_<wbr>PWMA_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>3</a></div><div class="desc docblock-short">FLEXPWM1_PWMA_SELECT_INPUT_3 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="FLEXPWM1_PWMB_SELECT_INPUT_0/index.html" title="mod imxrt_ral::iomuxc::FLEXPWM1_PWMB_SELECT_INPUT_0">FLEXPW<wbr>M1_<wbr>PWMB_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>0</a></div><div class="desc docblock-short">FLEXPWM1_PWMB_SELECT_INPUT_0 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="FLEXPWM1_PWMB_SELECT_INPUT_1/index.html" title="mod imxrt_ral::iomuxc::FLEXPWM1_PWMB_SELECT_INPUT_1">FLEXPW<wbr>M1_<wbr>PWMB_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>1</a></div><div class="desc docblock-short">FLEXPWM1_PWMB_SELECT_INPUT_1 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="FLEXPWM1_PWMB_SELECT_INPUT_2/index.html" title="mod imxrt_ral::iomuxc::FLEXPWM1_PWMB_SELECT_INPUT_2">FLEXPW<wbr>M1_<wbr>PWMB_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>2</a></div><div class="desc docblock-short">FLEXPWM1_PWMB_SELECT_INPUT_2 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="FLEXPWM1_PWMB_SELECT_INPUT_3/index.html" title="mod imxrt_ral::iomuxc::FLEXPWM1_PWMB_SELECT_INPUT_3">FLEXPW<wbr>M1_<wbr>PWMB_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>3</a></div><div class="desc docblock-short">FLEXPWM1_PWMB_SELECT_INPUT_3 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="FLEXSPI_DQS_FA_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::FLEXSPI_DQS_FA_SELECT_INPUT">FLEXSP<wbr>I_<wbr>DQS_<wbr>FA_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">FLEXSPI_DQS_FA_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="FLEXSPI_DQS_FB_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::FLEXSPI_DQS_FB_SELECT_INPUT">FLEXSP<wbr>I_<wbr>DQS_<wbr>FB_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">FLEXSPI_DQS_FB_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="KPP_COL_SELECT_INPUT_0/index.html" title="mod imxrt_ral::iomuxc::KPP_COL_SELECT_INPUT_0">KPP_<wbr>COL_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>0</a></div><div class="desc docblock-short">KPP_COL_SELECT_INPUT_0 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="KPP_COL_SELECT_INPUT_1/index.html" title="mod imxrt_ral::iomuxc::KPP_COL_SELECT_INPUT_1">KPP_<wbr>COL_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>1</a></div><div class="desc docblock-short">KPP_COL_SELECT_INPUT_1 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="KPP_COL_SELECT_INPUT_2/index.html" title="mod imxrt_ral::iomuxc::KPP_COL_SELECT_INPUT_2">KPP_<wbr>COL_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>2</a></div><div class="desc docblock-short">KPP_COL_SELECT_INPUT_2 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="KPP_COL_SELECT_INPUT_3/index.html" title="mod imxrt_ral::iomuxc::KPP_COL_SELECT_INPUT_3">KPP_<wbr>COL_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>3</a></div><div class="desc docblock-short">KPP_COL_SELECT_INPUT_3 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="KPP_ROW_SELECT_INPUT_0/index.html" title="mod imxrt_ral::iomuxc::KPP_ROW_SELECT_INPUT_0">KPP_<wbr>ROW_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>0</a></div><div class="desc docblock-short">KPP_ROW_SELECT_INPUT_0 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="KPP_ROW_SELECT_INPUT_1/index.html" title="mod imxrt_ral::iomuxc::KPP_ROW_SELECT_INPUT_1">KPP_<wbr>ROW_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>1</a></div><div class="desc docblock-short">KPP_ROW_SELECT_INPUT_1 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="KPP_ROW_SELECT_INPUT_2/index.html" title="mod imxrt_ral::iomuxc::KPP_ROW_SELECT_INPUT_2">KPP_<wbr>ROW_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>2</a></div><div class="desc docblock-short">KPP_ROW_SELECT_INPUT_2 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="KPP_ROW_SELECT_INPUT_3/index.html" title="mod imxrt_ral::iomuxc::KPP_ROW_SELECT_INPUT_3">KPP_<wbr>ROW_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>3</a></div><div class="desc docblock-short">KPP_ROW_SELECT_INPUT_3 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPI2C1_HREQ_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPI2C1_HREQ_SELECT_INPUT">LPI2<wbr>C1_<wbr>HREQ_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPI2C1_HREQ_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPI2C1_SCL_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPI2C1_SCL_SELECT_INPUT">LPI2<wbr>C1_<wbr>SCL_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPI2C1_SCL_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPI2C1_SDA_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPI2C1_SDA_SELECT_INPUT">LPI2<wbr>C1_<wbr>SDA_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPI2C1_SDA_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPI2C2_SCL_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPI2C2_SCL_SELECT_INPUT">LPI2<wbr>C2_<wbr>SCL_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPI2C2_SCL_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPI2C2_SDA_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPI2C2_SDA_SELECT_INPUT">LPI2<wbr>C2_<wbr>SDA_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPI2C2_SDA_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPSPI1_PCS_SELECT_INPUT_0/index.html" title="mod imxrt_ral::iomuxc::LPSPI1_PCS_SELECT_INPUT_0">LPSP<wbr>I1_<wbr>PCS_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>0</a></div><div class="desc docblock-short">LPSPI1_PCS_SELECT_INPUT_0 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPSPI1_SCK_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPSPI1_SCK_SELECT_INPUT">LPSP<wbr>I1_<wbr>SCK_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPSPI1_SCK_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPSPI1_SDI_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPSPI1_SDI_SELECT_INPUT">LPSP<wbr>I1_<wbr>SDI_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPSPI1_SDI_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPSPI1_SDO_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPSPI1_SDO_SELECT_INPUT">LPSP<wbr>I1_<wbr>SDO_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPSPI1_SDO_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPSPI2_PCS_SELECT_INPUT_0/index.html" title="mod imxrt_ral::iomuxc::LPSPI2_PCS_SELECT_INPUT_0">LPSP<wbr>I2_<wbr>PCS_<wbr>SELEC<wbr>T_<wbr>INPU<wbr>T_<wbr>0</a></div><div class="desc docblock-short">LPSPI2_PCS_SELECT_INPUT_0 DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPSPI2_SCK_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPSPI2_SCK_SELECT_INPUT">LPSP<wbr>I2_<wbr>SCK_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPSPI2_SCK_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPSPI2_SDI_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPSPI2_SDI_SELECT_INPUT">LPSP<wbr>I2_<wbr>SDI_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPSPI2_SDI_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPSPI2_SDO_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPSPI2_SDO_SELECT_INPUT">LPSP<wbr>I2_<wbr>SDO_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPSPI2_SDO_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPUART1_RXD_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPUART1_RXD_SELECT_INPUT">LPUAR<wbr>T1_<wbr>RXD_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPUART1_RXD_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPUART1_TXD_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPUART1_TXD_SELECT_INPUT">LPUAR<wbr>T1_<wbr>TXD_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPUART1_TXD_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPUART2_RXD_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPUART2_RXD_SELECT_INPUT">LPUAR<wbr>T2_<wbr>RXD_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPUART2_RXD_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPUART2_TXD_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPUART2_TXD_SELECT_INPUT">LPUAR<wbr>T2_<wbr>TXD_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPUART2_TXD_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPUART3_RXD_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPUART3_RXD_SELECT_INPUT">LPUAR<wbr>T3_<wbr>RXD_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPUART3_RXD_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPUART3_TXD_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPUART3_TXD_SELECT_INPUT">LPUAR<wbr>T3_<wbr>TXD_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPUART3_TXD_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPUART4_RXD_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPUART4_RXD_SELECT_INPUT">LPUAR<wbr>T4_<wbr>RXD_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPUART4_RXD_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="LPUART4_TXD_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::LPUART4_TXD_SELECT_INPUT">LPUAR<wbr>T4_<wbr>TXD_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">LPUART4_TXD_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="NMI_GLUE_NMI_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::NMI_GLUE_NMI_SELECT_INPUT">NMI_<wbr>GLUE_<wbr>NMI_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">NMI_GLUE_NMI_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="SPDIF_IN1_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::SPDIF_IN1_SELECT_INPUT">SPDI<wbr>F_<wbr>IN1_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">SPDIF_IN1_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="SPDIF_TX_CLK2_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::SPDIF_TX_CLK2_SELECT_INPUT">SPDI<wbr>F_<wbr>TX_<wbr>CLK2_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">SPDIF_TX_CLK2_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_00/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_00">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>00</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_00 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_01/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_01">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>01</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_01 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_02/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_02">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>02</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_02 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_03/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_03">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>03</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_03 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_04/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_04">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>04</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_04 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_05/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_05">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>05</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_05 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_06/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_06">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>06</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_06 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_07/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_07">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>07</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_07 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_08/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_08">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>08</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_08 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_09/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_09">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>09</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_09 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_10/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_10">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>10</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_10 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_11/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_11">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>11</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_11 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_12/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_12">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>12</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_12 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_13/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_13">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>13</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_13 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_00/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_00">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>00</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_00 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_01/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_01">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>01</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_01 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_02/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_02">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>02</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_02 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_03/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_03">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>03</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_03 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_04/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_04">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>04</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_04 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_05/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_05">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>05</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_05 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_06/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_06">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>06</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_06 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_07/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_07">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>07</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_07 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_08/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_08">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>08</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_08 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_09/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_09">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>09</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_09 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_10/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_10">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>10</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_10 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_11/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_11">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>11</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_11 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_12/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_12">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>12</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_12 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_13/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_13">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>13</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_13 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_AD_14/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_AD_14">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>14</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_AD_14 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_00/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_00">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>00</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_00 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_01/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_01">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>01</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_01 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_02/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_02">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>02</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_02 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_03/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_03">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>03</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_03 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_04/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_04">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>04</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_04 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_05/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_05">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>05</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_05 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_06/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_06">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>06</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_06 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_07/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_07">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>07</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_07 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_08/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_08">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>08</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_08 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_09/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_09">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>09</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_09 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_10/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_10">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>10</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_10 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_11/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_11">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>11</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_11 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_12/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_12">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>12</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_12 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_13/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_13">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>13</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_13 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_MUX_CTL_PAD_GPIO_SD_14/index.html" title="mod imxrt_ral::iomuxc::SW_MUX_CTL_PAD_GPIO_SD_14">SW_<wbr>MUX_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>14</a></div><div class="desc docblock-short">SW_MUX_CTL_PAD_GPIO_SD_14 SW MUX Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_00/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_00">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>00</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_00 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_01/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_01">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>01</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_01 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_02/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_02">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>02</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_02 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_03/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_03">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>03</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_03 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_04/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_04">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>04</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_04 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_05/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_05">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>05</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_05 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_06/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_06">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>06</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_06 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_07/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_07">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>07</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_07 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_08/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_08">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>08</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_08 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_09/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_09">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>09</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_09 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_10/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_10">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>10</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_10 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_11/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_11">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>11</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_11 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_12/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_12">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>12</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_12 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_13/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_13">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>13</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_13 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_00/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_00">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>00</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_00 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_01/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_01">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>01</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_01 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_02/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_02">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>02</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_02 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_03/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_03">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>03</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_03 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_04/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_04">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>04</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_04 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_05/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_05">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>05</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_05 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_06/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_06">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>06</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_06 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_07/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_07">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>07</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_07 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_08/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_08">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>08</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_08 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_09/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_09">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>09</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_09 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_10/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_10">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>10</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_10 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_11/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_11">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>11</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_11 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_12/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_12">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>12</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_12 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_13/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_13">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>13</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_13 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_AD_14/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_AD_14">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>AD_<wbr>14</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_AD_14 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_00/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_00">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>00</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_00 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_01/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_01">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>01</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_01 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_02/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_02">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>02</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_02 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_03/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_03">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>03</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_03 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_04/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_04">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>04</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_04 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_05/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_05">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>05</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_05 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_06/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_06">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>06</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_06 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_07/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_07">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>07</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_07 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_08/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_08">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>08</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_08 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_09/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_09">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>09</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_09 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_10/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_10">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>10</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_10 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_11/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_11">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>11</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_11 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_12/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_12">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>12</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_12 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_13/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_13">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>13</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_13 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="SW_PAD_CTL_PAD_GPIO_SD_14/index.html" title="mod imxrt_ral::iomuxc::SW_PAD_CTL_PAD_GPIO_SD_14">SW_<wbr>PAD_<wbr>CTL_<wbr>PAD_<wbr>GPIO_<wbr>SD_<wbr>14</a></div><div class="desc docblock-short">SW_PAD_CTL_PAD_GPIO_SD_14 SW PAD Control Register</div></li><li><div class="item-name"><a class="mod" href="USB_OTG_ID_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::USB_OTG_ID_SELECT_INPUT">USB_<wbr>OTG_<wbr>ID_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">USB_OTG_ID_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="USB_OTG_OC_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::USB_OTG_OC_SELECT_INPUT">USB_<wbr>OTG_<wbr>OC_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">USB_OTG_OC_SELECT_INPUT DAISY Register</div></li><li><div class="item-name"><a class="mod" href="XEV_GLUE_RXEV_SELECT_INPUT/index.html" title="mod imxrt_ral::iomuxc::XEV_GLUE_RXEV_SELECT_INPUT">XEV_<wbr>GLUE_<wbr>RXEV_<wbr>SELEC<wbr>T_<wbr>INPUT</a></div><div class="desc docblock-short">XEV_GLUE_RXEV_SELECT_INPUT DAISY Register</div></li></ul><h2 id="structs" class="section-header">Structs<a href="#structs" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="struct" href="struct.RegisterBlock.html" title="struct imxrt_ral::iomuxc::RegisterBlock">Register<wbr>Block</a></div><div class="desc docblock-short">IOMUXC</div></li></ul><h2 id="constants" class="section-header">Constants<a href="#constants" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="constant" href="constant.IOMUXC.html" title="constant imxrt_ral::iomuxc::IOMUXC">IOMUXC</a></div><div class="desc docblock-short">IOMUXC</div></li></ul><h2 id="functions" class="section-header">Functions<a href="#functions" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="fn" href="fn.number.html" title="fn imxrt_ral::iomuxc::number">number</a></div><div class="desc docblock-short">Returns the instance number <code>N</code> for a peripheral instance.</div></li></ul><h2 id="types" class="section-header">Type Aliases<a href="#types" class="anchor">§</a></h2><ul class="item-table"><li><div class="item-name"><a class="type" href="type.IOMUXC.html" title="type imxrt_ral::iomuxc::IOMUXC">IOMUXC</a></div></li><li><div class="item-name"><a class="type" href="type.Instance.html" title="type imxrt_ral::iomuxc::Instance">Instance</a></div></li></ul></section></div></main></body></html> |