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134 lines
5.1 KiB
Markdown
134 lines
5.1 KiB
Markdown
# Real-Time Interrupt-driven Concurrency
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A concurrency framework for building real-time systems.
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Formerly known as Real-Time For the Masses.
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[](https://crates.io/crates/cortex-m-rtic)
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[](https://docs.rs/cortex-m-rtic)
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[](https://rtic.rs/)
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[](https://github.com/rust-lang/rust/releases/tag/1.36.0)
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[](https://matrix.to/#/#rtic:matrix.org)
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[](https://hackmd.io/@xmis9JvZT8Gvo9lOEKyZ4Q/SkBJKsjuH)
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## Features
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- **Tasks** as the unit of concurrency [^1]. Tasks can be *event triggered*
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(fired in response to asynchronous stimuli) or spawned by the application on
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demand.
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- **Message passing** between tasks. Specifically, messages can be passed to
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software tasks at spawn time.
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- **A timer queue** [^2]. Software tasks can be scheduled to run at some time
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in the future. This feature can be used to implement periodic tasks.
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- Support for prioritization of tasks and, thus, **preemptive multitasking**.
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- **Efficient and data race free memory sharing** through fine grained *priority
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based* critical sections [^1].
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- **Deadlock free execution** guaranteed at compile time. This is a stronger
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guarantee than what's provided by [the standard `Mutex`
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abstraction][std-mutex].
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[std-mutex]: https://doc.rust-lang.org/std/sync/struct.Mutex.html
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- **Minimal scheduling overhead**. The task scheduler has minimal software
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footprint; the hardware does the bulk of the scheduling.
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- **Highly efficient memory usage**: All the tasks share a single call stack and
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there's no hard dependency on a dynamic memory allocator.
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- **All Cortex-M devices are fully supported**.
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- This task model is amenable to known WCET (Worst Case Execution Time) analysis
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and scheduling analysis techniques. (Though we haven't yet developed Rust
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friendly tooling for that.)
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## Requirements
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- Rust 1.36.0+
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- Applications must be written using the 2018 edition.
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### `cortex-m` 0.6 vs 0.7 in RTIC 0.5.x
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`cortex-m` 0.7 started using trait `InterruptNumber` for interrupts instead of `Nr` from `bare-metal`. In order to preserve backwards compatibility, RTIC 0.5.x will keep using `cortex-m` 0.6 by default. `cortex-m` 0.7 can be enabled using the feature `cortex-m-7` and disabling default features, e.g. on your `Cargo.toml`:
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```
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cortex-m-rtic = { version = "0.5.8", default-features = false, features = ["cortex-m-7"] }
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```
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RTIC 0.6 already uses `cortex-m` 0.7 by default.
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## [User documentation](https://rtic.rs) - [(Development version)](https://rtic.rs/dev)
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## [API reference](https://rtic.rs/stable/api/)
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## [Community provided examples repo][examples]
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[examples]: https://github.com/rtic-rs/rtic-examples
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## Chat
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Join us and talk about RTIC in the [Matrix room][matrix-room].
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Weekly meeting notes can be found over at [HackMD][hackmd]
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[matrix-room]: https://matrix.to/#/#rtic:matrix.org
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[hackmd]: https://hackmd.io/@xmis9JvZT8Gvo9lOEKyZ4Q/SkBJKsjuH
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## Contributing
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New features and big changes should go through the RFC process in the
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[dedicated RFC repository][rfcs].
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[rfcs]: https://github.com/rtic-rs/rfcs
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## Acknowledgments
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This crate is based on the [Real-Time For the Masses language][rtfm-lang]
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created by the Embedded Systems group at [Luleå University of Technology][ltu],
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led by [Prof. Per Lindgren][per].
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[rtfm-lang]: http://www.rtfm-lang.org/
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[ltu]: https://www.ltu.se/?l=en
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[per]: https://www.ltu.se/staff/p/pln-1.11258?l=en
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## References
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[^1]: Eriksson, J., Häggström, F., Aittamaa, S., Kruglyak, A., & Lindgren, P.
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(2013, June). Real-time for the masses, step 1: Programming API and static
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priority SRP kernel primitives. In Industrial Embedded Systems (SIES), 2013
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8th IEEE International Symposium on (pp. 110-113). IEEE.
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[^2]: Lindgren, P., Fresk, E., Lindner, M., Lindner, A., Pereira, D., & Pinho,
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L. M. (2016). Abstract timers and their implementation onto the arm cortex-m
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family of mcus. ACM SIGBED Review, 13(1), 48-53.
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## License
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All source code (including code snippets) is licensed under either of
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- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
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[https://www.apache.org/licenses/LICENSE-2.0][L1])
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- MIT license ([LICENSE-MIT](LICENSE-MIT) or
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[https://opensource.org/licenses/MIT][L2])
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[L1]: https://www.apache.org/licenses/LICENSE-2.0
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[L2]: https://opensource.org/licenses/MIT
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at your option.
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The written prose contained within the book is licensed under the terms of the
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Creative Commons CC-BY-SA v4.0 license ([LICENSE-CC-BY-SA](LICENSE-CC-BY-SA) or
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[https://creativecommons.org/licenses/by-sa/4.0/legalcode][L3]).
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[L3]: https://creativecommons.org/licenses/by-sa/4.0/legalcode
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### Contribution
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Unless you explicitly state otherwise, any contribution intentionally submitted
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for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
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licensed as above, without any additional terms or conditions.
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